Datasheet > AD9857_17

AD9857_17

更新时间： 2022-02-26 12:47:31

品牌	Logo	应用领域
亚德诺 - ADI		/
页数	文件大小	规格书
41页	893K
描述
CMOS 200 MSPS 14-Bit Quadrature Digital Upconverter

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数据手册

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AD9857_17 数据手册

AD9857

SPECIFICATIONS

V_S= 3.3 V 5ꢀ, R_SET= 1.96 kΩ, external reference clock frequency = 10 MHz with REFCLK multiplier enabled at 20×.

Table 1.

Parameter

Temp

Test Level

Min

Typ

Max

Unit

REF CLOCK INPUT CHARACTERISTICS

Frequency Range

REFCLK Multiplier Disabled

REFCLK Multiplier Enabled at 4×

REFCLK Multiplier Enabled at 20×

Input Capacitance

Input Impedance

Duty Cycle

Duty Cycle with REFCLK Multiplier Enabled

Differential Input (VDD/2) 200 mV

DAC OUTPUT CHARACTERISTICS

Resolution

Full-Scale Output Current

Gain Error

Output Offset

Differential Nonlinearity

Integral Nonlinearity

Full

25°C

200

MHz

MΩ

100

1.45

1.85

Bits

% FS

µA

LSB

8.5

25°C

1.6

Output Capacitance

Residual Phase Noise @ 1 kHz Offset, 40 MHz A_OUT

REFCLK Multiplier Enabled at 20×

REFCLK Multiplier at 4×

REFCLK Multiplier Disabled

Voltage Compliance Range

Wideband SFDR

25°C

−107

−123

−145

dBc/Hz

−0.5

+1.0

1 MHz to 20 MHz Analog Out

20 MHz to 40 MHz Analog Out

40 MHz to 60 MHz Analog Out

60 MHz to 80 MHz Analog Out

Narrowband SFDR

25°C

−75

−65

−62

−60

dBc

10 MHz Analog Out ( 1 MHz)

10 MHz Analog Out ( 250 kHz)

10 MHz Analog Out ( 50 kHz)

10 MHz Analog Out ( 10 kHz)

65 MHz Analog Out ( 1 MHz)

65 MHz Analog Out ( 250 kHz)

65 MHz Analog Out ( 50 kHz)

65 MHz Analog Out ( 10 kHz)

80 MHz Analog Out ( 1 MHz)

80 MHz Analog Out ( 250 kHz)

80 MHz Analog Out ( 50 kHz)

80 MHz Analog Out ( 0 kHz)

25°C

−87

−88

−92

−94

−86

−88

−85

−86

dBc

Rev. C| Page 5 of 40

1...3 4 567 8 9...41

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