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AD9845AJST PDF预览

AD9845AJST

更新时间: 2024-01-12 05:32:41
品牌 Logo 应用领域
亚德诺 - ADI /
页数 文件大小 规格书
22页 250K
描述
Complete 12-Bit 30 MSPS CCD Signal Processor

AD9845AJST 数据手册

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AD9845A  
PIN CONFIGURATIONS  
48 47 46 45 44 43 42 41 40 39 38 37  
1
2
3
4
5
6
7
8
9
(LSB) D0  
36  
35  
34  
33  
32  
31  
30  
29  
28  
27  
26  
25  
AUX1IN  
AVSS  
AUX2IN  
AVDD2  
BYP4  
PIN 1  
IDENTIFIER  
D1  
D2  
D3  
D4  
AD9845A  
TOP VIEW  
(Not to Scale)  
D5  
NC  
D6  
CCDIN  
BYP2  
D7  
D8  
BYP1  
10  
11  
12  
D9  
AVDD1  
AVSS  
AVSS  
D10  
(MSB) D11  
13 14 15 16 17 18 19 20 21 22 23 24  
NC = NO CONNECT  
PIN FUNCTION DESCRIPTIONS  
Pin Number  
Name  
Type  
Description  
1–12  
13  
14  
15, 41  
16  
17  
18  
19  
20  
21  
D0–D11  
DRVDD  
DRVSS  
DVSS  
DATACLK  
DVDD1  
HD  
PBLK  
CLPOB  
SHP  
SHD  
CLPDM  
VD  
AVSS  
AVDD1  
BYP1  
DO  
P
P
P
DI  
P
DI  
DI  
DI  
DI  
DI  
DI  
DI  
P
Digital Data Outputs  
Digital Output Driver Supply  
Digital Output Driver Ground  
Digital Ground  
Digital Data Output Latch Clock  
Digital Supply  
Horizontal Drive. Used with VD for Color Steering Control  
Preblanking Clock Input  
Black Level Clamp Clock Input  
CDS Sampling Clock for CCD’s Reference Level  
CDS Sampling Clock for CCD’s Data Level  
Input Clamp Clock Input  
Vertical Drive. Used with HD for Color Steering Control  
Analog Ground  
Analog Supply  
Internal Bias Level Decoupling  
Internal Bias Level Decoupling  
Analog Input for CCD Signal  
Internally Not Connected  
Internal Bias Level Decoupling  
Analog Supply  
22  
23  
24  
25, 26, 35  
27  
28  
29  
30  
31  
32  
33  
34  
36  
37  
38  
39  
40  
42  
43  
44  
P
AO  
AO  
AI  
NC  
AO  
P
AI  
AI  
AO  
AO  
AO  
P
DI  
NC  
DI  
NC  
DI  
DI  
DI  
BYP2  
CCDIN  
NC  
BYP4  
AVDD2  
AUX2IN  
AUX1IN  
CML  
VRT  
VRB  
DVDD2  
THREE-STATE  
NC  
STBY  
NC  
Analog Input  
Analog Input  
Internal Bias Level Decoupling  
A/D Converter Top Reference Voltage Decoupling  
A/D Converter Bottom Reference Voltage Decoupling  
Digital Supply  
Digital Output Disable. Active High  
May be tied high or low. Do not leave floating.  
Standby Mode, Active High. Same as Serial Interface  
Internally Not Connected. May be Tied High or Low  
Serial Digital Interface Load Pulse  
Serial Digital Interface Data  
45  
46  
47  
48  
SL  
SDATA  
SCK  
Serial Digital Interface Clock  
TYPE: AI = Analog Input, AO = Analog Output, DI = Digital Input, DO = Digital Output, P = Power.  
–6–  
REV. 0  

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