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AD9845AJST PDF预览

AD9845AJST

更新时间: 2024-02-29 01:16:50
品牌 Logo 应用领域
亚德诺 - ADI /
页数 文件大小 规格书
22页 250K
描述
Complete 12-Bit 30 MSPS CCD Signal Processor

AD9845AJST 数据手册

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AD9845A  
(CL = 20 pF, fSAMP = 30 MHz, CCD-Mode Timing in Figures 10 and 11, AUX-Mode Timing in Figure 7.  
Serial Timing in Figures 2629.)  
TIMING SPECIFICATIONS  
Parameter  
Symbol  
Min  
Typ  
Max  
Unit  
SAMPLE CLOCKS  
DATACLK, SHP, SHD Clock Period  
DATACLK Hi/Low Pulsewidth  
SHP Pulsewidth  
tCONV  
tADC  
tSHP  
tSHD  
tCDM  
tCOB  
tS1  
32  
13  
5
5
4
2
0
13  
33  
ns  
ns  
ns  
ns  
Pixels  
Pixels  
ns  
ns  
ns  
16.7  
8.3  
8.3  
10  
SHD Pulsewidth  
CLPDM Pulsewidth  
CLPOB Pulsewidth1  
20  
SHP Rising Edge to SHD Falling Edge  
SHP Rising Edge to SHD Rising Edge  
Internal Clock Delay  
8.3  
16.7  
3.0  
tS2  
tID  
Inhibited Clock Period  
tINH  
10  
ns  
DATA OUTPUTS  
Output Delay  
Output Hold Time  
Pipeline Delay  
tOD  
tH  
14.5  
7.6  
9
16  
ns  
ns  
Cycles  
7.0  
SERIAL INTERFACE  
Maximum SCK Frequency  
SL to SCK Setup Time  
SCK to SL Hold Time  
SDATA Valid to SCK Rising Edge Setup  
SCK Falling Edge to SDATA Valid Hold  
SCK Falling Edge to SDATA Valid Read  
fSCLK  
tLS  
tLH  
tDS  
tDH  
tDV  
10  
10  
10  
10  
10  
10  
MHz  
ns  
ns  
ns  
ns  
ns  
NOTES  
1Minimum CLPOB pulsewidth is for functional operation only. Wider typical pulses are recommended to achieve low noise clamp performance.  
Specifications subject to change without notice.  
ORDERING GUIDE  
ABSOLUTE MAXIMUM RATINGS  
With  
Respect  
To  
Temperature  
Range  
Package  
Description  
Package  
Option  
Model  
Parameter  
Min Max  
Unit  
AD9845AJST –20°C to +85°C Thin Plastic  
ST-48  
AVDD1, AVDD2  
DVDD1, DVDD2  
DRVDD  
AVSS  
DVSS  
DRVSS –0.3 +3.9  
–0.3 +3.9  
–0.3 +3.9  
V
V
V
Quad Flatpack  
(LQFP)  
Digital Outputs  
SHP, SHD, DATACLK  
CLPOB, CLPDM, PBLK DVSS  
SCK, SL, SDATA  
VRT, VRB, CMLEVEL  
BYP1-4, CCDIN  
Junction Temperature  
Lead Temperature  
(10 sec)  
DRVSS –0.3 DRVDD + 0.3  
V
V
V
V
V
V
°C  
°C  
THERMAL CHARACTERISTICS  
Thermal Resistance  
48-Lead LQFP Package  
DVSS  
–0.3 DVDD + 0.3  
–0.3 DVDD + 0.3  
–0.3 DVDD + 0.3  
–0.3 AVDD + 0.3  
–0.3 AVDD + 0.3  
150  
DVSS  
AVSS  
AVSS  
θ
JA = 92°C  
300  
CAUTION  
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily  
accumulate on the human body and test equipment and can discharge without detection. Although  
the AD9845A features proprietary ESD protection circuitry, permanent damage may occur on  
devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are  
recommended to avoid performance degradation or loss of functionality.  
WARNING!  
ESD SENSITIVE DEVICE  
REV. 0  
–5–  

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