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AD9433BSQ-105 PDF预览

AD9433BSQ-105

更新时间： 2024-02-20 22:12:07
品牌 Logo 应用领域
亚德诺 - ADI 转换器模数转换器信息通信管理
页数 文件大小 规格书
24页 992K
描述
12-Bit, 105 MSPS/125 MSPS IF Sampling A/D Converter

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AD9433BSQ-105 技术参数

是否无铅： 含铅是否Rohs认证： 不符合
生命周期：Active零件包装代码：QFP
包装说明：HLQFP,针数：52
Reach Compliance Code：unknown风险等级：5.39
转换器类型：ADC, PROPRIETARY METHODJESD-30 代码：S-PQFP-G52
JESD-609代码：e0长度：10 mm
最大线性误差 (EL)：0.0317%湿度敏感等级：3
模拟输入通道数量：1位数：12
功能数量：1端子数量：52
最高工作温度：85 °C最低工作温度：-40 °C
输出位码：OFFSET BINARY, 2'S COMPLEMENT BINARY输出格式：PARALLEL, WORD
封装主体材料：PLASTIC/EPOXY封装代码：HLQFP
封装形状：SQUARE封装形式：FLATPACK, HEAT SINK/SLUG, LOW PROFILE
峰值回流温度（摄氏度）：240采样速率：105 MHz
采样并保持/跟踪并保持：TRACK座面最大高度：1.6 mm
标称供电电压：5 V表面贴装：YES
技术：BICMOS温度等级：INDUSTRIAL
端子面层：TIN LEAD端子形式：GULL WING
端子节距：0.65 mm端子位置：QUAD
处于峰值回流温度下的最长时间：30宽度：10 mm
Base Number Matches：1

AD9433BSQ-105 数据手册

 浏览型号AD9433BSQ-105的Datasheet PDF文件第2页浏览型号AD9433BSQ-105的Datasheet PDF文件第3页浏览型号AD9433BSQ-105的Datasheet PDF文件第4页浏览型号AD9433BSQ-105的Datasheet PDF文件第5页浏览型号AD9433BSQ-105的Datasheet PDF文件第6页浏览型号AD9433BSQ-105的Datasheet PDF文件第7页 
12-Bit, 105 MSPS/125 MSPS  
IF Sampling A/D Converter  
a
AD9433  
FUNCTIONAL BLOCK DIAGRAM  
FEATURES  
IF Sampling up to 350 MHz  
SNR = 67.5 dB, fIN up to Nyquist @ 105 MSPS  
SFDR = 83 dBc, fIN 70 MHz @ 105 MSPS  
SFDR = 72 dBc, fIN 150 MHz @ 105 MSPS  
2 V p-p Analog Input Range Option  
On-Chip Clock Duty Cycle Stabilization  
On-Chip Reference and Track/Hold  
SFDR Optimization Circuit  
V
AD9433  
V
CC  
DD  
AIN  
PIPELINE  
ADC  
OUTPUT  
STAGING  
D11–D0  
T/H  
AIN  
12  
12  
DFS  
ENCODE  
ENCODE  
TIMING  
Excellent Linearity:  
DNL = ꢀ0.25 LSB (Typ)  
REF  
SFDR  
ENCODE  
INL = ꢀ0.5 LSB (Typ)  
750 MHz Full Power Analog Bandwidth  
Power Dissipation = 1.35 W Typical @ 125 MSPS  
Two’s Complement or Offset Binary Data Format  
5.0 V Analog Supply Operation  
2.5 V to 3.3 V TTL/CMOS Outputs  
GND  
REF REF  
OUT IN  
APPLICATIONS  
Cellular Infrastructure Communication Systems  
3G Single and Multicarrier Receivers  
IF Sampling Schemes  
Wideband Carrier Frequency Systems  
Point to Point Radios  
LMDS, Wireless Broadband  
MMDS Base Station Units  
The encode clock supports either differential or single-ended  
input and is PECL-compatible. The output format is user-  
selectable for binary or two’s complement and provides an  
overrange (OR) signal.  
Cable Reverse Path  
Fabricated on an advanced BiCMOS process, the AD9433 is  
available in a thermally enhanced 52-lead plastic quad flatpack  
specified over the industrial temperature range (–40°C to  
+85°C) and is pin-compatible with the AD9432.  
Communications Test Equipment  
Radar and Satellite Ground Systems  
GENERAL INTRODUCTION  
The AD9433 is a 12-bit monolithic sampling analog-to-digital  
converter with an on-chip track-and-hold circuit and is designed  
for ease of use. The product operates up to 125 MSPS conver-  
sion rate and is optimized for outstanding dynamic performance  
in wideband and high IF carrier systems.  
PRODUCT HIGHLIGHTS  
1. IF Sampling  
The AD9433 maintains outstanding ac performance up to  
input frequencies of 350 MHz. Suitable for 3G Wideband  
Cellular IF sampling receivers.  
The ADC requires a 5 V analog power supply and a differential  
encode clock for full performance operation. No external refer-  
ence or driver components are required for many applications.  
The digital outputs are TTL/CMOS compatible and a separate  
output power supply pin supports interfacing with 3.3 V or  
2.5 V logic.  
2. Pin-Compatibility  
This ADC has the same footprint and pin layout as the  
AD9432, 12-Bit 80/105 MSPS ADC.  
3. SFDR Performance  
A user-selectable on-chip circuit optimizes SFDR performance  
as much at 85 dBc from dc to 70 MHz.  
A user-selectable, on-chip proprietary circuit optimizes spurious-  
free dynamic range (SFDR) versus signal-to-noise-and-distortion  
(SINAD) ratio performance for different input signal frequencies,  
providing as much as 83 dBc SFDR performance over the dc  
to 70 MHz band.  
4. Sampling Rate  
At 125 MSPS, this ADC is ideally suited for current wireless  
and wired broadband applications such as LMDS/MMDS  
and cable reverse path.  
REV. 0  
Information furnished by Analog Devices is believed to be accurate and  
reliable. However, no responsibility is assumed by Analog Devices for its  
use, norforanyinfringementsofpatentsorotherrightsofthirdpartiesthat  
may result from its use. No license is granted by implication or otherwise  
under any patent or patent rights of Analog Devices.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781/329-4700  
Fax: 781/326-8703  
www.analog.com  
© Analog Devices, Inc., 2001  
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