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AD8403ARU50-REEL

更新时间： 2024-01-04 03:31:19
品牌 Logo 应用领域
亚德诺 - ADI 光电二极管转换器电阻器
页数 文件大小 规格书
20页 431K
描述
IC QUAD 50K DIGITAL POTENTIOMETER, 3-WIRE SERIAL CONTROL INTERFACE, 256 POSITIONS, PDSO24, 1.10 MM, MO-153AD, TSSOP-24, Digital Potentiometer

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AD8403ARU50-REEL 技术参数

是否Rohs认证： 不符合生命周期：Obsolete
零件包装代码：TSSOP包装说明：1.10 MM, MO-153AD, TSSOP-24
针数：24Reach Compliance Code：not_compliant
ECCN代码：EAR99HTS代码：8542.39.00.01
风险等级：5.17其他特性：IT CAN ALSO OPERATE FROM A 5V NOMINAL SUPPLY
标称带宽：0.125 kHz控制接口：3-WIRE SERIAL
转换器类型：DIGITAL POTENTIOMETERJESD-30 代码：R-PDSO-G24
JESD-609代码：e0长度：7.8 mm
功能数量：4位置数：256
端子数量：24最高工作温度：125 °C
最低工作温度：-40 °C封装主体材料：PLASTIC/EPOXY
封装代码：TSSOP封装等效代码：TSSOP24,.25
封装形状：RECTANGULAR封装形式：SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度（摄氏度）：NOT SPECIFIED电源：3/5 V
认证状态：Not Qualified电阻定律：LINEAR
最大电阻器端电压：5.5 V最小电阻器端电压：
座面最大高度：1.2 mm子类别：Digital Potentiometers
标称供电电压：3 V表面贴装：YES
技术：CMOS标称温度系数：500 ppm/ °C
温度等级：AUTOMOTIVE端子面层：Tin/Lead (Sn85Pb15)
端子形式：GULL WING端子节距：0.65 mm
端子位置：DUAL处于峰值回流温度下的最长时间：NOT SPECIFIED
标称总电阻：50000 Ω宽度：4.4 mm
Base Number Matches：1

AD8403ARU50-REEL 数据手册

 浏览型号AD8403ARU50-REEL的Datasheet PDF文件第1页浏览型号AD8403ARU50-REEL的Datasheet PDF文件第3页浏览型号AD8403ARU50-REEL的Datasheet PDF文件第4页浏览型号AD8403ARU50-REEL的Datasheet PDF文件第5页浏览型号AD8403ARU50-REEL的Datasheet PDF文件第6页浏览型号AD8403ARU50-REEL的Datasheet PDF文件第7页 
(VDD = 3 V ꢂ 10% or 5 V ꢂ 10%, VA = VDD, VB = 0 V,  
AD8400/AD8402/AD8403–SPECIFICATIONS –40ꢃC ≤ T ≤ +125ꢃC unless otherwise noted.)  
A
ELECTRICAL CHARACTERISTICS–10 kꢀ VERSION  
Parameter  
Symbol  
Conditions  
Min  
Typ1  
Max  
Unit  
DC CHARACTERISTICS RHEOSTAT MODE (Specifications Apply to All VRs)  
Resistor Differential NL2  
Resistor Nonlinearity2  
Nominal Resistance3  
Resistance Tempco  
Wiper Resistance  
Nominal Resistance Match  
R-DNL  
R-INL  
RAB  
∆RAB/∆T  
RW  
RWB, VA = No Connect  
RWB, VA = No Connect  
TA = 25°C, Model: AD840XYY10  
VAB = VDD, Wiper = No Connect  
IW = 1 V/R  
–1  
–2  
8
1/4  
1/2  
10  
500  
50  
+1  
+2  
12  
LSB  
LSB  
kΩ  
ppm/°C  
Ω
%
100  
1
∆R/RAB  
CH 1 to 2, 3, or 4, VAB = VDD, TA = 25°C  
0.2  
DC CHARACTERISTICS POTENTIOMETER DIVIDER Specifications Apply to All VRs  
Resolution  
N
INL  
8
Bits  
Integral Nonlinearity4  
Differential Nonlinearity4  
–2  
–1  
–1  
–1.5  
1/2  
1/4  
1/4  
1/2  
15  
+2  
+1  
+1  
+1.5  
LSB  
LSB  
LSB  
LSB  
ppm/°C  
LSB  
LSB  
DNL  
DNL  
DNL  
∆VW/∆T  
VWFSE  
VWZSE  
VDD = 5 V  
VDD = 3 V TA = 25°C  
V
DD = 3 V TA = –40°C, +85°C  
Voltage Divider Tempco  
Full-Scale Error  
Zero-Scale Error  
Code = 80H  
Code = FFH  
Code = 00H  
–4  
0
–2.8  
1.3  
0
2
RESISTOR TERMINALS  
Voltage Range5  
VA, B, W  
CA, B  
CW  
IA_SD  
RW_SD  
0
VDD  
V
Capacitance6 Ax, Bx  
Capacitance6 Wx  
f = 1 MHz, Measured to GND, Code = 80H  
f = 1 MHz, Measured to GND, Code = 80H  
VA = VDD, VB = 0 V, SHDN = 0  
75  
pF  
pF  
µA  
Ω
120  
0.01  
100  
Shutdown Current7  
Shutdown Wiper Resistance  
5
200  
VA = VDD, VB = 0 V, SHDN = 0, VDD = 5 V  
DIGITAL INPUTS AND OUTPUTS  
Input Logic High  
Input Logic Low  
Input Logic High  
Input Logic Low  
VIH  
VIL  
VIH  
VIL  
VOH  
VOL  
IIL  
VDD = 5 V  
VDD = 5 V  
VDD = 3 V  
VDD = 3 V  
RL = 2.2 kΩ to VDD  
IOL = 1.6 mA, VDD = 5 V  
VIN = 0 V or +5 V, VDD = 5 V  
2.4  
V
V
V
V
V
V
µA  
pF  
0.8  
0.6  
2.1  
Output Logic High  
Output Logic Low  
Input Current  
VDD – 0.1  
0.4  
1
Input Capacitance6  
CIL  
5
POWER SUPPLIES  
Power Supply Range  
VDD Range  
IDD  
IDD  
PDISS  
PSS  
PSS  
2.7  
5.5  
5
4
V
µA  
mA  
µW  
%/%  
%/%  
Supply Current (CMOS)  
Supply Current (TTL)8  
Power Dissipation (CMOS)9  
Power Supply Sensitivity  
VIH = VDD or VIL = 0 V  
0.01  
0.9  
VIH = 2.4 V or 0.8 V, VDD = 5.5 V  
VIH = VDD or VIL = 0 V, VDD = 5.5 V  
VDD = 5 V 10%  
27.5  
0.0002 0.001  
VDD = 3 V 10%  
0.006  
0.03  
DYNAMIC CHARACTERISTICS6, 10  
Bandwidth –3 dB  
Total Harmonic Distortion  
VW Settling Time  
BW_10K  
THDW  
tS  
eNWB  
CT  
R = 10 kΩ  
600  
0.003  
2
9
–65  
kHz  
%
µs  
nV/√Hz  
dB  
VA = 1 V rms + 2 V dc, VB = 2 V dc, f = 1 kHz  
VA = VDD, VB = 0 V, 1% Error Band  
RWB = 5 kΩ, f = 1 kHz, RS = 0  
VA = VDD, VB = 0 V  
Resistor Noise Voltage  
Crosstalk11  
NOTES  
11Typicals represent average readings at 25°C and VDD = 5 V.  
12Resistor position nonlinearity error R-INL is the deviation from an ideal value measured between the maximum resistance and the minimum resistance wiper  
1positions. R-DNL measures the relative step change from ideal between successive tap positions. Parts are guaranteed monotonic. See TPC 29 test circuit.  
1IW = 50 µA for VDD = 3 V and IW = 400 µA for VDD = 5 V for the 10 kΩ versions.  
13  
V
AB  
= VDD, Wiper (VW) = No Connect.  
14INL and DNL are measured at VW with the RDAC configured as a potentiometer divider similar to a voltage output D/A converter. VA = VDD and VB = 0 V.  
1DNL Specification limits of 1 LSB maximum are Guaranteed Monotonic operating conditions. See TPC 28 test circuit.  
15Resistor terminals A, B, W have no limitations on polarity with respect to each other.  
16Guaranteed by design and not subject to production test. Resistor-terminal capacitance tests are measured with 2.5 V bias on the measured terminal. The remaining  
1resistor terminals are left open circuit.  
17Measured at the Ax terminals. All Ax terminals are open circuited in shutdown mode.  
18Worst-case supply current consumed when input logic level at 2.4 V, standard characteristic of CMOS logic. See TPC 20 for a plot of IDD versus logic voltage.  
19  
P
is calculated from (IDD × VDD). CMOS logic level inputs result in minimum power dissipation.  
DISS  
10All Dynamic Characteristics use VDD = 5 V.  
11Measured at a VW pin where an adjacent VW pin is making a full-scale voltage change.  
Specifications subject to change without notice.  
–2–  
REV. C  
1234567...20

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