AD8403AN10

更新时间： 2024-01-11 10:40:40

品牌	Logo	应用领域
亚德诺 - ADI		转换器电位器数字电位计电阻器光电二极管
页数	文件大小	规格书
20页	497K
描述
1-/2-/4-Channel Digital Potentiometers

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技术参数
数据手册

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AD8403AN10 技术参数

是否无铅：	含铅	是否Rohs认证：	不符合
生命周期：	Active	零件包装代码：	DIP
包装说明：	DIP,	针数：	24
Reach Compliance Code：	unknown	风险等级：	5.77
其他特性：	IT CAN ALSO OPERATE FROM A 5V NOMINAL SUPPLY	标称带宽：	0.6 kHz
控制接口：	3-WIRE SERIAL	转换器类型：	DIGITAL POTENTIOMETER
JESD-30 代码：	R-PDIP-T24	JESD-609代码：	e0
长度：	31.75 mm	湿度敏感等级：	NOT APPLICABLE
功能数量：	4	位置数：	256
端子数量：	24	最高工作温度：	125 °C
最低工作温度：	-40 °C	封装主体材料：	PLASTIC/EPOXY
封装代码：	DIP	封装形状：	RECTANGULAR
封装形式：	IN-LINE	峰值回流温度（摄氏度）：	NOT APPLICABLE
认证状态：	COMMERCIAL	电阻定律：	LINEAR
最大电阻器端电压：	5.5 V	最小电阻器端电压：
座面最大高度：	5.33 mm	标称供电电压：	3 V
表面贴装：	NO	标称温度系数：	500 ppm/ °C
温度等级：	AUTOMOTIVE	端子面层：	TIN LEAD
端子形式：	THROUGH-HOLE	端子节距：	2.54 mm
端子位置：	DUAL	处于峰值回流温度下的最长时间：	NOT APPLICABLE
标称总电阻：	10000 Ω	宽度：	7.62 mm
Base Number Matches：	1

AD8403AN10 数据手册

AD8400/AD8402/AD8403

The ac characteristics of the RDACs are dominated by the inter-

nal parasitic capacitances and the external capacitive loads. The

–3 dB bandwidth of the AD8403AN10 (10 kΩ resistor) mea-

sures 600 kHz at half scale as a potentiometer divider. Figure 23

provides the large signal BODE plot characteristics of the three

available resistor versions 10 kΩ, 50 kΩ, and 100 kΩ. The gain

flatness versus frequency graph, Figure 26, predicts filter appli-

cations performance. A parasitic simulation model has been de-

veloped, and is shown in Figure 42. Listing I provides a macro

model net list for the 10 kΩ RDAC:

Certain boundary conditions must be satisfied for proper

AD8400/AD8402/AD8403 operation. First, all analog signals

must remain within the 0 to V_DDrange used to operate the

single-supply AD8400/AD8402/AD8403 products. For standard

potentiometer divider applications, the wiper output can be

used directly. For low resistance loads, buffer the wiper with a

suitable rail-to-rail op amp such as the OP291 or the OP279.

Second, for ac signals and bipolar dc adjustment applications, a

virtual ground will generally be needed. Whatever method is

used to create the virtual ground, the result must provide the

necessary sink and source current for all connected loads, in-

cluding adequate bypass capacitance. Figure 33 shows one

channel of the AD8402 connected in an inverting program-

mable gain amplifier circuit. The virtual ground is set at +2.5 V

which allows the circuit output to span a ±2.5 volt range with

respect to virtual ground. The rail-to-rail amplifier capability is

necessary for the widest output swing. As the wiper is adjusted

from its midscale reset position (80_H) toward the A terminal

(code FF_H), the voltage gain of the circuit is increased in suc-

cessfully larger increments. Alternatively, as the wiper is ad-

justed toward the B terminal (code 00_H), the signal becomes

attenuated. The plot in Figure 43 shows the wiper settings for a

100:1 range of voltage gain (V/V). Note the ±10 dB of pseudo-

logarithmic gain around 0 dB (1 V/V). This circuit is mainly

useful for gain adjustments in the range of 0.14 V/V to 4 V/V;

beyond this range the step sizes become very large and the resis-

tance of the driving circuit can become a significant term in the

gain equation.

Listing I. Macro Model Net List for RDAC

.PARAM DW=255, RDAC=10E3

.SUBCKT DPOT (A,W,)

RAW

RBW

{DW/256*90.4E-12+30E-12}

{(1-DW/256)*RDAC+50}

120E-12

{DW/256*RDAC+50}

{(1-DW/256)*90.4E-12+30E-12}

.ENDS DPOT

The total harmonic distortion plus noise (THD+N) is measured

at 0.003% in an inverting op amp circuit using an offset ground

and a rail-to-rail OP279 amplifier, Figure 33. Thermal noise is

primarily Johnson noise, typically 9 nV/√Hz for the 10 kΩ ver-

sion at f = 1 kHz. For the 100 kΩ device, thermal noise becomes

29 nV/√Hz. Channel-to-channel crosstalk measures less than

–65 dB at f = 100 kHz. To achieve this isolation, the extra ground

pins provided on the package to segregate the individual RDACs

must be connected to circuit ground. AGND and DGND pins

should be at the same voltage potential. Any unused potentio-

meters in a package should be connected to ground. Power sup-

ply rejection is typically –35 dB at 10 kHz (care is needed to

minimize power supply ripple in high accuracy applications).

256

224

192

160

128

APPLICATIONS

The digital potentiometer (RDAC) allows many of the applica-

tions of trimming potentiometers to be replaced by a solid-state

solution offering compact size, freedom from vibration, shock

and open contact problems encountered in hostile environ-

ments. A major advantage of the digital potentiometer is its

programmability. Any settings can be saved for later recall in

system memory.

0.1

1.0

INVERTING GAIN – V/V

Figure 43. Inverting Programmable Gain Plot

The two major configurations of the RDAC include the

potentiometer divider (basic 3-terminal application) and the

rheostat (2-terminal configuration) connections shown in

Figures 29 and 30.

–15–

REV. B

1...12 13 141516 17 18...20

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与AD8403AN10相关器件

型号	品牌	描述	获取价格	数据表
AD8403AN100	ADI	1-/2-/4-Channel Digital Potentiometers	获取价格
AD8403AN50	ADI	1-/2-/4-Channel Digital Potentiometers	获取价格
AD8403AN50	ROCHESTER	QUAD 50K DIGITAL POTENTIOMETER, 3-WIRE SERIAL CONTROL INTERFACE, 256 POSITIONS, PDIP24, PL	获取价格
AD8403AR1	ADI	1-/2-/4-Channel Digital Potentiometers	获取价格
AD8403AR10	ADI	1-/2-/4-Channel Digital Potentiometers	获取价格
AD8403AR100	ADI	1-/2-/4-Channel Digital Potentiometers	获取价格

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