Datasheet > AD8338ACPZ-R7

AD8338ACPZ-R7

更新时间： 2022-05-20 03:39:17

品牌	Logo	应用领域
亚德诺 - ADI		放大器
页数	文件大小	规格书
16页	406K
描述
Low Power, 18 MHz Variable Gain Amplifier

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AD8338ACPZ-R7 数据手册

Data Sheet

AD8338

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

12 FBKP

11 OUTP

10 OUTM

INPR

INPD

INMD

INMR

AD8338

TOP VIEW

(Not to Scale)

FBKM

NOTES

1. THE EXPOSED PAD SHOULD BE TIED

TO A QUIET ANALOG GROUND.

Figure 3. Pin Configuration

Table 4. Pin Function Descriptions

Pin No.

Mnemonic

Description

EPAD

INPR

INPD

INMD

INMR

COMM

MODE

Exposed Pad. The exposed pad should be tied to a quiet analog ground.

Positive 500 Ω Resistor Input for Voltage Input Applications.

Positive Input for Current Input Applications.

Negative Input for Current Input Applications.

Negative 500 Ω Resistor Input for Voltage Input Applications.

Ground.

Gain Mode. This pin selects positive or negative gain slope for gain control. When this pin is tied to VBAT, the

gain of the AD8338 increases proportionally with an increase of the voltage on the GAIN pin. When this pin is

tied to COMM, the gain decreases with an increase of the voltage on the GAIN pin.

GAIN

DETO

FBKM

OUTM

OUTP

FBKP

Gain Control Input, 12.5 mV/dB or 80 dB/V.

Detector Output Terminal, 10 µA. If the AGC feature is not used, tie this pin to COMM.

Negative Feedback Node. For more information, see the Adjusting the Output Common-Mode Voltage section.

Negative Output.

Positive Output.

Positive Feedback Node. For more information, see the Adjusting the Output Common-Mode Voltage section.

Voltage for Automatic Gain Control Circuit. This pin controls the target rms output voltage for the AGC circuit.

For more information, see the AGC Circuit section.

VAGC

OFSN

VBAT

VREF

Offset Null Terminal. For more information, see the Offset Correction Circuit section.

Positive Supply Voltage.

Internal 1.5 V Voltage Reference.

Rev. 0 | Page 5 of 16

1 2 3 456 7 8...16

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