AD8317
Figure 33 shows the response of the AGC RF output to a pulse
on VSET. As VSET decreases from 1.7 V to 0.4 V, the AGC loop
responds with an RF burst. In this configuration, the input
signal to the ADL5330 is a 1 GHz sine wave at a power level
of −15 dBm.
AD8317
I
LOG
VOUT
CLPF
+4
1.5kΩ
3.5pF
C
T
FLT
AD8317 VSET PULSE
Figure 34. Lowering the Postdemodulation Bandwidth
1
CFLT is selected by
1
CFLT
=
− 3.5pF
(12)
(2π ×1.5 kΩ×Video Bandwidth)
ADL5330 OUTPUT
2
The video bandwidth should typically be set to a frequency
equal to about one-tenth the minimum input frequency. This
ensures that the output ripple of the demodulated log output,
which is at twice the input frequency, is well filtered.
CH1 2.00V
M10.0µs
699.800µs
CH2 50mVΩ
A CH1
2.48V
T
In many log amp applications, it may be necessary to lower
the corner frequency of the postdemodulation filter to achieve
low output ripple while maintaining a rapid response time to
changes in signal level. An example of a 4-pole active filter is
shown in the AD8307 data sheet.
Figure 33. Oscilloscope Screenshot Showing
the Response Time of the AGC Loop
Response time and the amount of signal integration are con-
trolled by CFLT. This functionality is analogous to the feedback
capacitor around an integrating amplifier. Although it is
possible to use large capacitors for CFLT, in most applications,
values under 1 nF provide sufficient filtering.
OPERATION BEYOND 8 GHz
The AD8317 is specified for operation up to 8 GHz, but it provides
useful measurement accuracy over a reduced dynamic range of
up to 10 GHz. Figure 35 shows the performance of the AD8317
over temperature at 10 GHz when the device is configured as
shown in Figure 22. Dynamic range is reduced at this frequency,
but the AD8317 does provide 30 dB of measurement range
within 3 dB of linearity error.
Calibration in controller mode is similar to the method used
in measurement mode. A simple 2-point calibration can be
done by applying two known VSET voltages or DAC codes and
measuring the output power from the VGA. Slope and intercept
can then be calculated by:
Slope = (VSET1 − VSET2)/(POUT1 − POUT2
Intercept = POUT1 − VSET1/Slope
)
(9)
(10)
(11)
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
5
4
3
V
SETx = Slope × (POUTX − Intercept)
2
More information on the use of the ADL5330 in AGC applica-
tions can be found in the ADL5330 data sheet.
1
0
OUTPUT FILTERING
–1
–2
–3
–4
–5
For applications in which maximum video bandwidth and,
consequently, fast rise time are desired, it is essential that the
CLPF pin be left unconnected and free of any stray capacitance.
The nominal output video bandwidth of 50 MHz can be reduced
by connecting a ground-referenced capacitor (CFLT) to the CLPF
pin, as shown in Figure 34. This is generally done to reduce
output ripple (at twice the input frequency for a symmetric
input waveform such as sinusoidal signals).
–40
–35
–30
–25
–20
–15
–10
–5
0
5
P
(dBm)
IN
Figure 35. VOUT and Log Conformance vs. Input Amplitude at 10.0 GHz,
Multiple Devices, RTADJ = Open, CLPF = 1000 pF
Implementing an impedance match for frequencies beyond
8 GHz can improve the sensitivity of the AD8317 and measure-
ment range.
Operation beyond 10 GHz is possible, but part-to-part
variation, most notably in the intercept, becomes significant.
Rev. B | Page 15 of 20