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AD8315_06

更新时间: 2022-04-23 23:00:11
品牌 Logo 应用领域
亚德诺 - ADI 控制器GSM
页数 文件大小 规格书
24页 561K
描述
50 dB GSM PA Controller

AD8315_06 数据手册

 浏览型号AD8315_06的Datasheet PDF文件第16页浏览型号AD8315_06的Datasheet PDF文件第17页浏览型号AD8315_06的Datasheet PDF文件第18页浏览型号AD8315_06的Datasheet PDF文件第20页浏览型号AD8315_06的Datasheet PDF文件第21页浏览型号AD8315_06的Datasheet PDF文件第22页 
AD8315  
increases the phase margin, which helps to make the step response  
of the circuit more stable when the PA output power is low and  
the slope of the PA’s power control function is the steepest.  
In both situations, the voltage on VSET should be kept below  
200 mV during power-on and power-off to prevent any  
unwanted transients on VAPC.  
A smaller filter capacitor can be used by inserting a series  
resistor between VAPC and the control input of the PA. A  
series resistor works with the input impedance of the PA to  
create a resistor divider and reduces the loop gain. The size of  
the resistor divider ratio depends upon the available output  
swing of VAPC and the required control voltage on the PA.  
INPUT COUPLING OPTIONS  
The internal 5 pF coupling capacitor of the AD8315, along with  
the low frequency input impedance of 2.8 kΩ, give a high-pass  
input corner frequency of approximately 16 MHz. This sets the  
minimum operating frequency. Figure 40, Figure 41, and Figure 42  
show three options for input coupling. A broadband resistive  
match can be implemented by connecting a shunt resistor to  
ground at RFIN (see Figure 40). This 52.3 Ω resistor (other  
values can also be used to select different overall input impedances)  
combines with the input impedance of the AD8315 to give a  
broadband input impedance of 50 Ω. While the input resistance  
and capacitance (CIN and RIN) of the AD8315 varies from device  
to device by approximately 20ꢁ, and over frequency (see  
Figure 11), the dominance of the external shunt resistor means  
that the variation in the overall input impedance is close to the  
tolerance of the external resistor. This method of matching is  
most useful in wideband applications or in multiband systems  
where there is more than one operating frequency.  
This technique can also be used to limit the control voltage in  
situations where the PA cannot deliver the power level being  
demanded by VAPC. Overdrive of the control input of some  
PAs causes increased distortion. It should be noted, however,  
that if the control loop opens (that is, VAPC goes to its maximum  
value in an effort to balance the loop), the quiescent current of  
the AD8315 increases somewhat, particularly at supply voltages  
greater than 3 V.  
Figure 39 shows the relationship between VSET and output  
power (POUT) at 0.9 GHz . The overall gain control function is  
linear in dB for a dynamic range of over 40 dB. Note that for  
VSET voltages below 300 mV, the output power drops off steeply  
as VAPC drops toward its minimum level of 250 mV.  
A reactive match can also be implemented as shown in  
Figure 41. This is not recommended at low frequencies as  
device tolerances dramatically vary the quality of the match  
because of the large input resistance. For low frequencies,  
Figure 40 or Figure 42 is recommended.  
40  
4
+85°C  
30  
3
+25°C  
20  
2
+85°C  
+25°C  
In Figure 41, the matching components are drawn as generic  
reactances. Depending on the frequency, the input impedance  
and the availability of standard value components, either a  
capacitor or an inductor is used. As in the previous case, the  
input impedance at a particular frequency is plotted on a Smith  
Chart and matching components are chosen (shunt or series L,  
shunt or series C) to move the impedance to the center of the chart.  
10  
1
–30°C  
0
0
–10  
–20  
–1  
–2  
–30°C  
–3  
–4  
–30  
–40  
AD8315  
0
0.2  
0.4  
0.6  
0.8  
(V)  
1.0  
1.2  
1.4  
1.6  
V
SET  
C
C
RFIN  
Figure 39. POUT vs. VSET at 0.9 GHz for Dual-Mode Handset  
Power Amplifier Application, −30°C, +25°C, and +85°C  
R
52.3V  
SHUNT  
C
R
IN  
IN  
ENABLE AND POWER-ON  
The AD8315 can be disabled by pulling the ENBL pin to  
ground. This reduces the supply current from its nominal level  
of 7.4 mA to 4 μA. The logic threshold for turning on the device  
is at 1.5 V with 2.7 V supply voltage. A plot of the enable glitch  
is shown in Figure 22. Alternatively, the device can be completely  
disabled by pulling the supply voltage to ground. To minimize  
glitch in this mode, ENBL and VPOS should be tied together. If  
VPOS is applied before the device is enabled, a narrow 750 mV  
glitch results (see Figure 29).  
Figure 40. Broadband Resistive Input Coupling Option  
AD8315  
C
C
X1  
RFIN  
C
R
IN  
X2  
IN  
Figure 41. Narrow-Band Reactive Input Coupling Option  
Rev. C | Page 19 of 24  
 
 
 
 
 

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