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AD8133ACPZ-REEL7 PDF预览

AD8133ACPZ-REEL7

更新时间: 2024-02-15 15:15:49
品牌 Logo 应用领域
罗彻斯特 - ROCHESTER 驱动接口集成电路驱动器
页数 文件大小 规格书
17页 1551K
描述
TRIPLE LINE DRIVER, QCC24, 4 X 4 MM, LEAD FREE, MO-220VGGD-2, LFCSP-24

AD8133ACPZ-REEL7 技术参数

是否无铅: 含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:QFN
包装说明:HVQCCN,针数:24
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:0.89
差分输出:YES驱动器位数:3
输入特性:DIFFERENTIAL接口集成电路类型:LINE DRIVER
接口标准:GENERAL PURPOSEJESD-30 代码:S-XQCC-N24
JESD-609代码:e3长度:4 mm
湿度敏感等级:3标称负供电电压:-5 V
功能数量:3端子数量:24
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:UNSPECIFIED封装代码:HVQCCN
封装形状:SQUARE封装形式:CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
峰值回流温度(摄氏度):260认证状态:Not Qualified
最大接收延迟:座面最大高度:1 mm
最大供电电压:6 V最小供电电压:4.5 V
标称供电电压:5 V表面贴装:YES
技术:BIPOLAR温度等级:INDUSTRIAL
端子面层:Matte Tin (Sn)端子形式:NO LEAD
端子节距:0.5 mm端子位置:QUAD
处于峰值回流温度下的最长时间:40宽度:4 mm
Base Number Matches:1

AD8133ACPZ-REEL7 数据手册

 浏览型号AD8133ACPZ-REEL7的Datasheet PDF文件第11页浏览型号AD8133ACPZ-REEL7的Datasheet PDF文件第12页浏览型号AD8133ACPZ-REEL7的Datasheet PDF文件第13页浏览型号AD8133ACPZ-REEL7的Datasheet PDF文件第14页浏览型号AD8133ACPZ-REEL7的Datasheet PDF文件第15页浏览型号AD8133ACPZ-REEL7的Datasheet PDF文件第17页 
AD8133  
In the daisy-chained and star networks that use diodes for isola-  
tion, return paths are required for the common-mode currents  
that flow through the series diodes. A common-mode tap can  
be implemented at each receiver by splitting the100 Ω termina-  
tion resistor into two 50 Ω resistors in series. The diode currents  
are routed from the tap between the 50 Ω resistors back to the  
respective transmitters over one of the wires of the fourth  
twisted pair in the UTP cable. Series resistors in the common-mode  
return path are generally required to set the desired diode current.  
OUTPUT PULL-DOWN  
The output pull-down feature, when used in conjunction with  
series Schottky diodes, offers a convenient means to connect a  
number of AD8133 outputs together to form a video network.  
The OPD pin is a binary input that controls the state of the  
AD8133 outputs. Its binary input level is referenced to the most  
positive power supply (see the Specifications tables for the logic  
levels). When the OPD input is driven to its low state, the  
AD8133 output is enabled and operates in its normal fashion. In  
this state, the VOCM input can be used to provide a positive bias  
on the series diodes, allowing the AD8133 to transmit signals  
over the network. When the OPD input is driven to its high  
state, the outputs of the AD8133 are forced to a low voltage,  
irrespective of the level on the VOCM input, reverse-biasing the  
series diodes and thus presenting high impedance to the net-  
work. This feature allows a three-state output to be realized that  
maintains its high impedance state even when the AD8133 is  
not powered. This condition can occur in KVM networks where  
the AD8133s do not all reside in the same module, and some  
modules in the network are not powered.  
In point-to-point networks, there is one transmitter and one  
receiver per cable, and the switching is generally implemented  
with a crosspoint switch. In this case, there is no need to use  
diodes or the output pull-down feature.  
Diode and crosspoint switching are by no means the only type  
of switching that can be used with the AD8133. Many other  
types of mechanical, electromechanical, and electronic switches  
can be used.  
LAYOUT AND POWER SUPPLY DECOUPLING  
CONSIDERATIONS  
It is recommended that the output pull-down feature only be  
used in conjunction with series diodes in such a way as to  
ensure that the diodes are reverse-biased when the output pull-  
down feature is asserted, since some loading conditions can  
prevent the output voltage from being pulled all the way down.  
Standard high speed PCB layout practices should be adhered to  
when designing with the AD8133. A solid ground plane is  
recommended and good wideband power supply decoupling  
networks should be placed as close as possible to the supply  
pins. Small surface-mount ceramic capacitors are recommended  
for these networks, and tantalum capacitors are recommended  
for bulk supply decoupling.  
KVM NETWORKS  
In daisy-chained KVM networks, the drivers are distributed  
along one cable and a triple receiver is located at one end.  
Schottky diodes in series with the driver outputs are biased such  
that the one driver that is transmitting video signals has its  
diodes forward-biased and the disabled drivers have their  
diodes reverse-biased. The output common-mode voltage, set  
by the VOCM input, supplies the forward-biased voltage. When  
the output pull-down feature is asserted, the differential outputs  
are pulled to a low voltage, reverse-biasing the diodes.  
AMPLIFIER-TO-AMPLIFIER ISOLATION  
The least amount of isolation between the three amplifiers  
exists between Amplifier A and Amplifier B. This is therefore  
viewed as the worst-case isolation and is what is reflected in the  
Specifications tables and Typical Performance Characteristics.  
Refer to the Basic Test Circuit shown in Figure 5 for the test  
conditions.  
EXPOSED PADDLE (EP)  
In star networks, all cables radiate out from a central hub,  
which contains a triple receiver. The series diodes are all located  
at the receiver in the star network. Only one ray of the star is  
transmitting at a given time, and all others are isolated by the  
reverse-biased diodes. Diode biasing is controlled in the same  
way as in the daisy-chained network.  
The LFCSP-24 package has an exposed paddle on the underside  
of its body. In order to achieve the specified thermal resistance,  
it must have a good thermal connection to one of the PCB  
planes. The exposed paddle must be soldered to a pad on the  
top of the board that is connected to an inner plane with several  
thermal vias.  
Rev. 0 | Page 15 of 16  
 

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