AD8131
OPERATIONAL DESCRIPTION
Definition of Terms
The AD8131 uses two feedback loops to separately control the
differential and common-mode output voltages. The differential
feedback, set by internal resistors, controls only the differential
output voltage. The common-mode feedback controls only the
common-mode output voltage. This architecture makes it easy
to arbitrarily set the output common-mode level. It is forced, by
internal common-mode feedback, to be equal to the voltage
applied to the VOCM input, without affecting the differential
output voltage.
R
F
R
+IN
–IN
G
G
–OUT
–OUT
+D
IN
V
V
R
L,dm
AD8131
,dm
OUT
OCM
+OUT
–D
IN
+OUT
R
R
F
The AD8131 architecture results in outputs that are very highly
balanced over a wide frequency range without requiring external
components or adjustments. The common-mode feedback loop
forces the signal component of the output common-mode voltage
to be zeroed. The result is nearly perfectly balanced differential
outputs, of identical amplitude and exactly 180 degrees apart
in phase.
Figure 37. Circuit Definitions
Differential voltage refers to the difference between two node
voltages. For example, the output differential voltage (or
equivalently output differential-mode voltage) is defined as:
V
OUT,dm = (V+OUT – V–OUT
)
V
+OUT and V–OUT refer to the voltages at the +OUT and –OUT
Analyzing an Application Circuit
terminals with respect to a common reference.
The AD8131 uses high open-loop gain and negative feedback to
force its differential and common-mode output voltages in such
a way as to minimize the differential and common-mode error
voltages. The differential error voltage is defined as the voltage
between the differential inputs labeled +IN and –IN in Figure
37. For most purposes, this voltage can be assumed to be zero.
Similarly, the difference between the actual output common-
mode voltage and the voltage applied to VOCM can also be
assumed to be zero. Starting from these two assumptions, any
application circuit can be analyzed.
Common-mode voltage refers to the average of two node volt-
ages. The output common-mode voltage is defined as:
V
OUT,cm = (V+OUT + V–OUT)/2
Balance is a measure of how well differential signals are matched
in amplitude and exactly 180 degrees apart in phase. Balance
is most easily determined by placing a well-matched resistor
divider between the differential voltage nodes and comparing
the magnitude of the signal at the divider’s midpoint with the
magnitude of the differential signal. By this definition, output
balance is the magnitude of the output common-mode voltage
divided by the magnitude of the output differential-mode
voltage:
Closed-Loop Gain
The differential mode gain of the circuit in Figure 37 can be
determined to be described by the following equation:
VOUT ,dm
VIN ,dm
RF
RG
=
= 2
VOUT,cm
Output Balance Error =
VOUT,dm
where RF = 1.5 kΩ and RG = 750 Ω nominally.
THEORY OF OPERATION
Estimating the Output Noise Voltage
The AD8131 differs from conventional op amps in that it has
two outputs whose voltages move in opposite directions. Like
an op amp, it relies on high open-loop gain and negative feed-
back to force these outputs to the desired voltages. The AD8131
behaves much like a standard voltage feedback op amp and
makes it easy to perform single-ended-to-differential conversion,
common-mode level-shifting, and amplification of differential
signals.
Similar to the case of a conventional op amp, the differential
output errors (noise and offset voltages) can be estimated by
multiplying the input referred terms, at +IN and –IN, by the
circuit noise gain. The noise gain is defined as:
RF
GN = 1 +
= 3
RG
The total output referred noise for the AD8131, including the
contributions of RF, RG, and op amp, is nominally 25 nV/√Hz
at 20 MHz.
Previous differential drivers, both discrete and integrated
designs, have been based on using two independent amplifiers,
and two independent feedback loops, one to control each of the
outputs. When these circuits are driven from a single-ended
source, the resulting outputs are typically not well balanced.
Achieving a balanced output has typically required exceptional
matching of the amplifiers and feedback networks.
Calculating an Application Circuit’s Input Impedance
The effective input impedance of a circuit such as that in Figure
37, at +DIN and –DIN, will depend on whether the amplifier is
being driven by a single-ended or differential signal source. For
balanced differential input signals, the input impedance (RIN,dm
between the inputs (+DIN and –DIN) is simply:
)
DC common-mode level-shifting has also been difficult with
previous differential drivers. Level-shifting has required the use
of a third amplifier and feedback loop to control the output
common-mode level. Sometimes the third amplifier has also
been used to attempt to correct an inherently unbalanced
circuit. Excellent performance over a wide frequency range has
proven difficult with this approach.
R
IN,dm = 2 × RG = 1.5 kΩ
In the case of a single-ended input signal (for example if –DIN is
grounded and the input signal is applied to +DIN), the input
impedance becomes:
REV. 0
–9–
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