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AD8131AR-REEL7 PDF预览

AD8131AR-REEL7

更新时间: 2024-02-11 04:35:00
品牌 Logo 应用领域
亚德诺 - ADI 驱动器
页数 文件大小 规格书
12页 200K
描述
Low-Cost, High-Speed Differential Driver

AD8131AR-REEL7 数据手册

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AD8131  
In this case, the input signal is provided by a signal generator  
with an output impedance of 50 . This is terminated with a  
49.9 resistor near +DIN of the AD8131. The effective parallel  
resistance of the source and termination is 25 . The 24.9 Ω  
resistor from –DIN to ground matches the +DIN source impedance  
and minimizes any dc and gain errors.  
RG  
RF  
RIN ,dm  
=
= 1.125 kΩ  
1 −  
2 × RG + RF  
(
)
If +DIN is driven by a low-impedance source over a short dis-  
tance, such as the output of an op amp, then no termination  
resistor is required at +DIN. In this case, the –DIN can be  
directly tied to ground.  
The circuit’s input impedance is effectively higher than it would  
be for a conventional op amp connected as an inverter because  
a fraction of the differential output voltage appears at the inputs  
as a common-mode signal, partially bootstrapping the voltage  
across the input resistor RG.  
+3 V Supply Differential A-to-D Driver  
Many newer A-to-D converters can run from a single +3 V  
supply, which can save significant system power. In order to  
increase the dynamic range at the analog input, they have differ-  
ential inputs, which doubles the dynamic range with respect to a  
single-ended input. An added benefit of using a differential  
input is that the distortion can be improved.  
Input Common-Mode Voltage Range in Single Supply  
Applications  
The AD8131 is optimized for level-shifting “ground” referenced  
input signals. For a single-ended input this would imply, for  
example, that the voltage at –DIN in Figure 37 would be zero  
volts when the amplifier’s negative power supply voltage (at V–)  
was also set to zero volts.  
The low distortion and ability to run from a single +3 V supply  
make the AD8131 suited as an A-to-D driver for some 10-bit,  
single supply applications. Figure 39 shows a schematic for a  
circuit for an AD8131 driving an AD9203, a 10-bit, 40 MSPS  
A-to-D converter.  
Setting the Output Common-Mode Voltage  
The AD8131’s VOCM pin is internally biased at a voltage  
approximately equal to the midsupply point (average value of  
the voltages on V+ and V–). Relying on this internal bias will  
result in an output common-mode voltage that is within about  
25 mV of the expected value.  
The common mode of the AD8131 output is set at midsupply  
by the voltage divider connected to VOCM, and ac bypassed with  
a 0.1 µF capacitor. This provides for maximum dynamic range  
between the supplies at the output of the AD8131. The 110 Ω  
resistors at the AD8131 output, along with the shunt capacitors  
form a one pole, low-pass filter for lowering noise and antialiasing.  
In cases where more accurate control of the output common-  
mode level is required, it is recommended that an external  
source, or resistor divider (made up of 10 kresistors), be used.  
Driving a Capacitive Load  
Figure 40 shows an FFT plot that was taken from the combined  
devices at an analog input frequency of 2.5 MHz and a 40 MSPS  
sampling rate. The performance of the AD8131 compares very  
favorably with a center-tapped transformer drive, which has  
typically been the best way to drive this A-to-D converter. The  
AD8131 has the advantage of maintaining dc performance,  
which a transformer solution cannot provide.  
A purely capacitive load can react with the pin and bondwire  
inductance of the AD8131 resulting in high frequency ringing in  
the pulse response. One way to minimize this effect is to place a  
small resistor in series with the amplifier’s outputs as shown in  
Figure 23.  
APPLICATIONS  
Unity-Gain, Single-Ended-to-Differential Driver  
If it is not necessary to offset the output common-mode volt-  
age (via the VOCM pin), then the AD8131 can make a simple  
unity-gain single-ended-to-differential amplifier that does not  
require any external components. Figure 41 shows the schematic  
for this circuit.  
Twisted-Pair Line Driver  
The AD8131 has on-chip resistors that provide for a gain-of-  
two without any external parts. Several on-chip resistors are  
trimmed to ensure that the gain is accurate, the common-mode  
rejection is good, and the output is well balanced. This makes  
the AD8131 very suitable as a single-ended-to-differential  
twisted-pair line driver.  
Referring to Figure 2, when –DIN is left floating, there is 100  
percent feedback of +OUT to –IN via the internal feedback  
resistor. This contrasts with the typical gain-of-two operation  
where –DIN is grounded and one third of the +OUT is fed back  
to –IN. The result is a closed-loop differential gain of one.  
Figure 38 shows a circuit of an AD8131 driving a twisted-pair  
line, like a Category 3 or Category 5 (Cat3 or Cat5), that are  
already installed in many buildings for telephony and data com-  
munications. The characteristic impedance of such transmission  
lines is usually about 100 . The outstanding balance of the  
AD8131 output will minimize the common-mode signal and there-  
fore the amount of EMI generated by driving the twisted pair.  
Upon careful observation, it can be seen that only +DIN and  
VOCM are referenced to ground. It is the case that the ground  
voltage at VOCM is the reference for this circuit. In this unity  
gain configuration, if a dc voltage is applied to VOCM to shift the  
common-mode voltage, a differential dc voltage will be created  
at the output, along with the common-mode voltage change.  
Thus, this configuration cannot be used when it is desired to  
offset the common-mode voltage of the output with respect to  
the input at +DIN.  
The two resistors in series with each output terminate the line at  
the transmit end. Since the impedances of the outputs of the  
AD8131 are very low, they can be thought of as a short circuit,  
and the two terminating resistors form a 100 termination at  
the transmit end of the transmission line. The receive end is  
directly terminated by a 100 resistor across the line.  
This back-termination of the transmission line divides the out-  
put signal by two. The fixed gain of two of the AD8131 will  
create a net unity gain for the system from end to end.  
REV. 0  
–10–  

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