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AD8092AR PDF预览

AD8092AR

更新时间: 2024-01-22 02:55:22
品牌 Logo 应用领域
罗彻斯特 - ROCHESTER 放大器光电二极管
页数 文件大小 规格书
21页 1462K
描述
DUAL OP-AMP, 27000uV OFFSET-MAX, PDSO8, MS-012AA, SOIC-8

AD8092AR 技术参数

是否无铅: 含铅生命周期:Active
零件包装代码:SOIC包装说明:MS-012AA, SOIC-8
针数:8Reach Compliance Code:unknown
风险等级:5.29Is Samacsys:N
放大器类型:OPERATIONAL AMPLIFIER最大平均偏置电流 (IIB):3.5 µA
标称共模抑制比:88 dB最大输入失调电压:27000 µV
JESD-30 代码:R-PDSO-G8JESD-609代码:e0
长度:4.9 mm湿度敏感等级:1
负供电电压上限:-6.3 V标称负供电电压 (Vsup):-5 V
功能数量:2端子数量:8
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
峰值回流温度(摄氏度):240座面最大高度:1.75 mm
标称压摆率:170 V/us子类别:Operational Amplifier
供电电压上限:6.3 V标称供电电压 (Vsup):5 V
表面贴装:YES温度等级:INDUSTRIAL
端子面层:TIN LEAD端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:30宽度:3.9 mm
Base Number Matches:1

AD8092AR 数据手册

 浏览型号AD8092AR的Datasheet PDF文件第5页浏览型号AD8092AR的Datasheet PDF文件第6页浏览型号AD8092AR的Datasheet PDF文件第7页浏览型号AD8092AR的Datasheet PDF文件第9页浏览型号AD8092AR的Datasheet PDF文件第10页浏览型号AD8092AR的Datasheet PDF文件第11页 
AD8091/AD8092  
MAXIMUM POWER DISSIPATION  
The maximum safe power dissipation in the AD8091/AD8092  
package is limited by the associated rise in junction temperature  
(TJ) on the die. The plastic encapsulating the die locally reaches  
the junction temperature. At approximately 150°C, which is the  
glass transition temperature, the plastic changes its properties.  
Even temporarily exceeding this temperature limit may change  
the stresses that the package exerts on the die, permanently  
shifting the parametric performance of the AD8091/AD8092.  
Exceeding a junction temperature of 175°C for an extended  
period of time can result in changes in the silicon devices,  
potentially causing failure.  
If the rms signal levels are indeterminate, then consider the  
worst case when VOUT = VS/4 for RL to midsupply  
2
V
4
RL  
S
PD =  
(
VS × IS +  
)
In single-supply operation with RL referenced to −VS, the worst  
case is VOUT = VS/2.  
Airflow increases heat dissipation, effectively reducing θJA. Also,  
more metal directly in contact with the package leads from  
metal traces, through holes, ground, and power planes reduces  
the θJA. Care must be taken to minimize parasitic capacitances  
at the input leads of high speed op amps as discussed in the  
Input Capacitance section.  
The still-air thermal properties of the package (θJA), the ambient  
temperature (TA), and the total power dissipated in the package  
(PD) can be used to determine the junction temperature of the die.  
The junction temperature can be calculated as  
Figure 4 shows the maximum safe power dissipation in the  
package vs. the ambient temperature for the SOIC-8  
(125°C/W), SOT23-5 (180°C/W), and MSOP-8 (150°C/W) on a  
JEDEC standard four-layer board.  
TJ =TA +  
(
PD ×θJA  
)
The power dissipated in the package (PD) is the sum of the  
quiescent power dissipation and the power dissipated in the  
package due to the load drive for all outputs. The quiescent  
power is the voltage between the supply pins (VS) times the  
quiescent current (IS). Assuming that the load (RL) is referenced  
to midsupply, then the total drive power is VS/2 × IOUT, some of  
which is dissipated in the package and some in the load  
(VOUT × IOUT). The difference between the total drive power and  
the load power is the drive power dissipated in the package.  
2.0  
T
= 150°C  
J
1.5  
1.0  
0.5  
0
SOIC-8  
MSOP-8  
PD = quiescent power +  
(
total drive power load power  
)
SOT23-5  
2
VS VOUT  
VOUT  
RL  
PD =  
(
VS × IS  
)
+
×
2
RL  
–40 –30 –20 –10  
0
10 20 30 40 50 60 70 80 90  
RMS output voltages should be considered. If RL is referenced to  
−VS, as in single-supply operation, then the total drive power is  
AMBIENT TEMPERATURE (°C)  
Figure 4. Maximum Power Dissipation vs.  
Temperature for a Four-Layer Board  
VS × IOUT  
.
Rev. C | Page 7 of 20  
 
 

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