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AD8007AKSZ-REEL PDF预览

AD8007AKSZ-REEL

更新时间: 2024-02-05 03:53:52
品牌 Logo 应用领域
亚德诺 - ADI 放大器光电二极管
页数 文件大小 规格书
20页 373K
描述
OP-AMP, 4000uV OFFSET-MAX, PDSO5, ROHS COMPLIANT, MO-203AA, SC70-5

AD8007AKSZ-REEL 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:TSSOT
包装说明:ROHS COMPLIANT, MO-203AA, SC70-5针数:5
Reach Compliance Code:unknownECCN代码:EAR99
HTS代码:8542.33.00.01风险等级:5.46
放大器类型:OPERATIONAL AMPLIFIER架构:CURRENT-FEEDBACK
25C 时的最大偏置电流 (IIB):8 µA标称共模抑制比:59 dB
频率补偿:YES最大输入失调电压:4000 µV
JESD-30 代码:R-PDSO-G5JESD-609代码:e3
长度:2 mm低-偏置:NO
低-失调:NO微功率:NO
湿度敏感等级:1负供电电压上限:-6.3 V
标称负供电电压 (Vsup):-5 V功能数量:1
端子数量:5最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TSSOP5/6,.08
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
包装方法:TAPE AND REEL峰值回流温度(摄氏度):260
功率:NO电源:+-2.5/+-6/5/12 V
可编程功率:NO认证状态:Not Qualified
座面最大高度:1.1 mm最小摆率:665 V/us
标称压摆率:1000 V/us子类别:Operational Amplifier
最大压摆率:10.2 mA供电电压上限:6.3 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:BIPOLAR温度等级:INDUSTRIAL
端子面层:Matte Tin (Sn)端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
处于峰值回流温度下的最长时间:40宽带:YES
宽度:1.25 mmBase Number Matches:1

AD8007AKSZ-REEL 数据手册

 浏览型号AD8007AKSZ-REEL的Datasheet PDF文件第14页浏览型号AD8007AKSZ-REEL的Datasheet PDF文件第15页浏览型号AD8007AKSZ-REEL的Datasheet PDF文件第16页浏览型号AD8007AKSZ-REEL的Datasheet PDF文件第18页浏览型号AD8007AKSZ-REEL的Datasheet PDF文件第19页浏览型号AD8007AKSZ-REEL的Datasheet PDF文件第20页 
AD8007/AD8008  
LAYOUT AND GROUNDING CONSIDERATIONS  
GROUNDING  
EXTERNAL COMPONENTS AND STABILITY  
The AD8007/AD8008 are current feedback amplifiers and, to a  
first order, the feedback resistor determines the bandwidth and  
stability. The gain, load impedance, supply voltage, and input  
impedances also have an effect.  
A ground plane layer is important in densely packed printed  
circuit boards (PCB) to minimize parasitic inductances. However,  
an understanding of where the current flows in a circuit is critical  
to implementing effective high speed circuit design. The length  
of the current path is directly proportional to the magnitude of  
parasitic inductances and thus the high frequency impedance of  
the path. High speed currents in an inductive ground return  
create unwanted voltage noise. Broad ground plane areas reduce  
parasitic inductance.  
Figure 11 shows the effect of changing RF on the bandwidth and  
peaking for a gain of 2. Increasing RF reduces peaking but also  
reduces bandwidth. Figure 6 shows that for a given RF increasing  
the gain also reduces peaking and bandwidth. Table 4 shows the  
recommended RF and RG values that optimize bandwidth with  
minimal peaking.  
INPUT CAPACITANCE  
Along with bypassing and ground, high speed amplifiers can be  
sensitive to parasitic capacitance between the inputs and ground.  
Even 1 pF or 2 pF of capacitance reduces the input impedance at  
high frequencies, in turn increasing the gain of the amplifier, which  
causes peaking of the frequency response or even oscillations if  
severe enough. Place the external passive components that are  
connected to the input pins as close as possible to the inputs to  
avoid parasitic capacitance. The ground and power planes must  
be kept at a distance of at least 0.05 mm from the input pins on  
all layers of the board.  
Table 4. Recommended Component Values  
Gain  
RF (Ω)  
RG (Ω)  
RS (Ω)  
200  
200  
200  
200  
−1  
499  
499  
+1  
499  
Not applicable  
+2  
+5  
+10  
499  
499  
499  
499  
124  
54.9  
200  
The load resistor also affects bandwidth, as shown in Figure 7 and  
Figure 10. A comparison between Figure 7 and Figure 10 also  
demonstrates the effect of gain and supply voltage.  
OUTPUT CAPACITANCE  
When driving loads with a capacitive component, stability  
improves by using a series snub resistor, RSNUB, at the output.  
The frequency and pulse responses for various capacitive  
loads are illustrated in Figure 12 and Figure 47, respectively.  
To a lesser extent, parasitic capacitances on the output can cause  
peaking of the frequency response. The following two methods  
minimize its effect:  
Put a small value resistor in series with the output to isolate  
the load capacitance from the output stage of the amplifier  
(see Figure 12).  
Increase the phase margin by increasing the gain of the  
amplifier or by increasing the value of the feedback resistor.  
For noninverting configurations, a resistor in series with the  
input, RS, is needed to optimize stability for a gain of 1, as  
illustrated in Figure 8. For larger noninverting gains, the effect  
of a series resistor is reduced.  
INPUT-TO-OUTPUT COUPLING  
To minimize capacitive coupling, the input and output signal  
traces should not be parallel. When they are not parallel, they  
help reduce unwanted positive feedback.  
Rev. E | Page 17 of 20  
 
 

AD8007AKSZ-REEL 替代型号

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