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AD7874BQ PDF预览

AD7874BQ

更新时间: 2024-01-28 06:36:27
品牌 Logo 应用领域
亚德诺 - ADI 转换器信息通信管理
页数 文件大小 规格书
16页 417K
描述
LC2MOS 4-Channel, 12-Bit Simultaneous Sampling Data Acquisition System

AD7874BQ 技术参数

Source Url Status Check Date:2013-05-01 14:56:21.354是否无铅:含铅
是否Rohs认证:不符合生命周期:Active
零件包装代码:DIP包装说明:DIP, DIP28,.6
针数:28Reach Compliance Code:not_compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:1.54Is Samacsys:N
最大模拟输入电压:15 V最小模拟输入电压:10 V
最长转换时间:35 µs转换器类型:ADC, SUCCESSIVE APPROXIMATION
JESD-30 代码:R-GDIP-T28JESD-609代码:e0
长度:37.84 mm最大线性误差 (EL):0.024%
标称负供电电压:-5 V模拟输入通道数量:4
位数:12功能数量:1
端子数量:28最高工作温度:125 °C
最低工作温度:-55 °C输出位码:2'S COMPLEMENT BINARY
封装主体材料:CERAMIC, GLASS-SEALED封装代码:DIP
封装等效代码:DIP28,.6封装形状:RECTANGULAR
封装形式:IN-LINE峰值回流温度(摄氏度):NOT APPLICABLE
电源:+-5 V认证状态:Not Qualified
采样速率:0.029 MHz采样并保持/跟踪并保持:TRACK
筛选级别:MIL-STD-883 Class B座面最大高度:5.59 mm
子类别:Analog to Digital Converters最大压摆率:18 mA
标称供电电压:5 V表面贴装:NO
技术:CMOS温度等级:MILITARY
端子面层:Tin/Lead (Sn63Pb37)端子形式:THROUGH-HOLE
端子节距:2.54 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT APPLICABLE宽度:13.2 mm
Base Number Matches:1

AD7874BQ 数据手册

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AD7874  
MULTIP LE AD 7874s  
the input signal connects to the buffer amplifier driving the ana-  
log input of the ADC. If the shorting plug is omitted, a wire link  
can be used to connect the input signal to the PCB component  
grid.  
Figure 18 shows a system where a number of AD7874s can be  
configured to handle multiple input channels. T his type of con-  
figuration is common in applications such as sonar, radar, etc.  
T he AD7874 is specified with maximum and minimum limits on  
aperture delay. T his means that the user knows the maximum  
difference in the sampling instant between all channels. T his al-  
lows the user to maintain relative phase information between the  
different channels.  
Microprocessor connections to the board are made via a 26-  
contact IDC connector, SKT 8, the pinout for which is shown in  
Figure 19. T his connector contains all data, control and status  
signals of the AD7874 (with the exception of the CLK input  
and the CONVST input which are provided via SKT 5 and  
SKT 7, respectively). It also contains decoded R/W and STRB  
inputs which are necessary for T MS32020 interfacing (and also  
for 68000 interfacing although pin labels on the 68000 are dif-  
ferent). Note that the AD7874 CS input must be decoded prior  
to the AD7874 evaluation board.  
A common read signal from the microprocessor drives the RD  
input of all AD7874s. Each AD7874 is designated a unique ad-  
dress selected by the address decoder. T he reference output of  
AD7874 number 1 is used to drive the reference input of all  
other AD7874s in the circuit shown in Figure 18. One REF  
OUT pin can drive several AD7874 REF IN pins. Alternatively,  
an external or system reference can be used to drive all REF IN  
inputs. A common reference ensures good full-scale tracking be-  
tween all channels.  
SKT 1, SKT 2, SKT 3 and SKT 4 provide the inputs for VIN1  
IN2, VIN3, VIN4 respectively. Assuming LK1 to LK4 are in  
,
V
place, these input signals are fed to four buffer amplifiers, IC1,  
before being applied to the AD7874. T he use of an external  
clock source is optional; there is a shorting plug (LK5) on the  
AD7874 CLK input which must be connected to either –5 V  
(for the ADCs own internal clock) or to SKT 5. SKT 6 and  
SKT 7 provide the reference and CONVST inputs respectively.  
Shorting plug LK6 provides the option of using the external ref-  
erence or the ADCs own internal reference.  
V
CH1  
RD  
RD  
V
V
V
CH2  
CH3  
CH4  
AD7874(1)  
CS  
REF OUT  
1
3
5
2
4
R/W  
STRB  
N/C  
RD  
CS  
6
N/C  
V
V
V
V
CH5  
CH6  
CH7  
CH8  
8
7
9
N/C  
INT  
RD  
AD7874(2)  
10  
ADDRESS  
DECODE  
N/C  
DB10  
DB8  
DB6  
DB4  
DB2  
DB0  
N/C  
ADDRESS  
CS  
11  
13  
15  
17  
19  
12  
14  
16  
18  
20  
DB11  
REF IN  
DB9  
DB7  
DB5  
DB3  
DB1  
REF IN  
RD  
V
CHm  
V
V
V
21  
23  
25  
22  
24  
26  
CHm+1  
CHm+2  
CHm+3  
AD7874(n)  
CS  
+
+
5V  
5V  
GND  
GND  
Figure 18. Multiple AD7874s in Multichannel System  
Figure 19. SKT8, IDC Connector Pinout  
P O WER SUP P LY CO NNECTIO NS  
D ATA ACQ UISITIO N BO ARD  
Figure 20 shows the AD7874 in a data acquisition circuit. T he  
corresponding printed circuit board (PCB) layout and silkscreen  
are shown in Figures 21 to 23. A 26-contact IDC connector pro-  
vides for a microprocessor connection to the board.  
T he PCB requires two analog power supplies and one 5 V digi-  
tal supply. T he analog supplies are labeled V+ and V– and the  
range for both supplies is 12 V to 15 V (see silkscreen in Figure  
23). Connection to the 5 V digital supply is made via SKT 8.  
T he +5 V supply and the –5 V supply required by the AD7874  
are generated from voltage regulators (IC3 and IC4) on the V+  
and V– supplies.  
A component grid is provided near the analog inputs on the  
PCB which may be used to provide antialiasing filters for the  
analog input channels or to provide signal conditioning circuitry.  
T o facilitate this option, four shorting plugs (labeled LK1 to  
LK4 on the PCB) are provided on the analog inputs, one plug  
per input. If the shorting plug for a particular channel is used,  
REV. C  
–13–  

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