AD7874BQ

更新时间： 2024-02-04 17:23:23

品牌	Logo	应用领域
亚德诺 - ADI		转换器信息通信管理
页数	文件大小	规格书
16页	417K
描述
LC2MOS 4-Channel, 12-Bit Simultaneous Sampling Data Acquisition System

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技术参数
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AD7874BQ 技术参数

Source Url Status Check Date：	2013-05-01 14:56:21.354	是否无铅：	含铅
是否Rohs认证：	不符合	生命周期：	Active
零件包装代码：	DIP	包装说明：	DIP, DIP28,.6
针数：	28	Reach Compliance Code：	not_compliant
ECCN代码：	EAR99	HTS代码：	8542.39.00.01
风险等级：	1.54	Is Samacsys：	N
最大模拟输入电压：	15 V	最小模拟输入电压：	10 V
最长转换时间：	35 µs	转换器类型：	ADC, SUCCESSIVE APPROXIMATION
JESD-30 代码：	R-GDIP-T28	JESD-609代码：	e0
长度：	37.84 mm	最大线性误差 (EL)：	0.024%
标称负供电电压：	-5 V	模拟输入通道数量：	4
位数：	12	功能数量：	1
端子数量：	28	最高工作温度：	125 °C
最低工作温度：	-55 °C	输出位码：	2'S COMPLEMENT BINARY
封装主体材料：	CERAMIC, GLASS-SEALED	封装代码：	DIP
封装等效代码：	DIP28,.6	封装形状：	RECTANGULAR
封装形式：	IN-LINE	峰值回流温度（摄氏度）：	NOT APPLICABLE
电源：	+-5 V	认证状态：	Not Qualified
采样速率：	0.029 MHz	采样并保持/跟踪并保持：	TRACK
筛选级别：	MIL-STD-883 Class B	座面最大高度：	5.59 mm
子类别：	Analog to Digital Converters	最大压摆率：	18 mA
标称供电电压：	5 V	表面贴装：	NO
技术：	CMOS	温度等级：	MILITARY
端子面层：	Tin/Lead (Sn63Pb37)	端子形式：	THROUGH-HOLE
端子节距：	2.54 mm	端子位置：	DUAL
处于峰值回流温度下的最长时间：	NOT APPLICABLE	宽度：	13.2 mm
Base Number Matches：	1

AD7874BQ 数据手册

AD7874

Some applications may require that the conversion is initiated

by the microprocessor rather than an external timer. One option

is to decode the AD7874 CONVST from the address bus so

that a write operation starts a conversion. Data is read at the

end of the conversion sequence as before. Figure 16 shows an

example of initiating conversion using this method. Note that

for all interfaces, a read operation should not be attempted dur-

ing conversion.

AD 7874–8086 Inter face

Figure 16 shows an interface between the AD7874 and the 8086

microprocessor. Unlike the previous interface examples, the

microprocessor initiates conversion. T his is achieved by gating

the 8086 WR signal with a decoded address output (different to

the AD7874 CS address). T he AD7874 INT line is used to in-

terrupt the microprocessor when the conversion sequence is

completed. Data is read from the AD7874 using the following

instruction:

AD 7874–MC68000 Inter face

MOV AX,ADC

An interface between the AD7874 and the MC68000 is shown

in Figure 15. As before, conversion is initiated using an external

timer. T he AD7874 INT line can be used to interrupt the pro-

cessor or, alternatively, software delays can ensure that conver-

sion has been completed before a read to the AD7874 is

attempted. Because of the nature of its interrupts, the 68000

requires additional logic (not shown in Figure 15) to allow it to

be interrupted correctly. For further information on 68000 in-

terrupts, consult the 68000 users manual.

where AX is the 8086 accumulator and

ADC is the AD7874 address.

ADDRESS BUS

ADDR

8086

DECODE

T he MC68000 AS and R/W outputs are used to generate a

separate RD input signal for the AD7874. CS is used to drive

the 68000 DTACK input to allow the processor to execute a

normal read operation to the AD7874. T he conversion results

are read using the following 68000 instruction:

AD7874*

LATCH

ALE

CONVST

MOVE.W ADC,D0

DB11

DB0

where D0 is the 68000 D0 register and

ADC is the AD7874 address.

AD15

AD0

TIMER

A15

ADDRESS/DATA BUS

*ADDITIONAL PINS OMITTED FOR CLARITY

ADDRESS BUS

ADDR

CONVST

Figure 16. AD7874–8086 Interface

MC68000

DECODE

DTACK

AD7874*

R/W

DB11

DB0

D15

DATA BUS

*ADDITIONAL PINS OMITTED FOR CLARITY

Figure 15. AD7874–MC68000 Interface

REV. C

–11–

1...8 9 101112 13 14...16

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与AD7874BQ相关器件

型号	品牌	描述	获取价格	数据表
AD7874BQ/883B	ADI	ADC, Successive Approximation	获取价格
AD7874BR	ADI	LC2MOS 4-Channel, 12-Bit Simultaneous Sampling Data Acquisition System	获取价格
AD7874BR	ROCHESTER	4-CH 12-BIT SUCCESSIVE APPROXIMATION ADC, PARALLEL ACCESS, PDSO28, SOIC-28	获取价格
AD7874BR-REEL	ADI	IC 4-CH 12-BIT SUCCESSIVE APPROXIMATION ADC, PARALLEL ACCESS, PDSO28, SOIC-28, Analog to D	获取价格
AD7874BRZ	ADI	暂无描述	获取价格
AD7874BRZ-REEL	ADI	4-CH 12-BIT SUCCESSIVE APPROXIMATION ADC, PARALLEL ACCESS, PDSO28, SOIC-28	获取价格

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