(VCC = +5 V ± 5%; VDD = +15 V ± 5%; VSS = –15 V ± 5%; AGND =
1
DGND = 0 V; T = TMIN to TMAX, unless otherwise noted)
AD7834/AD7835–SPECIFICATIONS
A
P
arameter
A
B
S
Units
Test Conditions/Comments
ACCURACY
Resolution
14
14
14
Bits
Relative Accuracy
Differential Nonlinearity
Full-Scale Error
TMIN to TMAX
±2
±0.9
±1
±0.9
±2
±0.9
LSB max
LSB max
Guaranteed Monotonic Over Temperature
VREF(+) = +7 V, VREF(–) = –7 V
±5
±4
±0.5
4
20
50
±5
±4
±0.5
4
20
50
±8
±5
±0.5
4
20
50
mV max
mV max
mV typ
ppm FSR/°C typ
ppm FSR/°C max
µV max
Zero-Scale Error
Gain Error
VREF(+) = +7 V, VREF(–) = –7 V
VREF(+) = +7 V, VREF(–) = –7 V
Gain Temperature Coefficient2
DC Crosstalk2
See Terminology. RL = 10 kΩ
REFERENCE INPUTS
DC Input Resistance
Input Current
30
±1
30
±1
30
±1
MΩ typ
µA max
Per Input
VREF(+) Range
VREF(–) Range
[VREF(+)–VREF(–)]
0/+8.192
–8.192/0
5/14
+7/+8.192 0/+8.192 V min/max
–8.192/0
7/14
–8.192/0 V min/max
5/14
V min/max
For Specified Performance. Can Go as Low as
0 V, but Performance Not Guaranteed
DEVICE SENSE GROUND INPUTS
Input Current
±2
±2
±2
µA max
Per Input. VDSG = –2 V to +2 V
DIGITAL INPUTS
VINH, Input High Voltage
VINL, Input Low Voltage
IINH, Input Current
2.4
0.8
±10
10
2.4
0.8
±10
10
2.4
0.8
±10
10
V min
V max
µA max
pF max
CIN, Input Capacitance
POWER REQUIREMENTS
VCC
VDD
VSS
5.0
15.0
–15.0
5.0
15.0
–15.0
5.0
15.0
–15.0
V nom
V nom
V nom
±5% for Specified Performance
±5% for Specified Performance
±5% for Specified Performance
Power Supply Sensitivity
∆Full Scale/∆VDD
∆Full Scale/∆VSS
ICC
110
100
0.2
3
110
100
0.2
3
110
100
0.5
3
dB typ
dB typ
mA max
mA max
mA max
mA max
mA max
mA max
VINH = VCC, VINL = DGND
AD7834. VINH = 2.4 V min, VINL = 0.8 V max
AD7835. VINH = 2.4 V min, VINL = 0.8 V max
AD7834. Outputs Unloaded
AD7835. Outputs Unloaded
Outputs Unloaded
6
6
6
IDD
ISS
10
15
10
10
15
10
15
15
15
(These characteristics are included for Design Guidance and are not
subject to production testing. )
AC PERFORMANCE CHARACTERISTICS
P
arameter
A
B
S
Units
Test Conditions/Comments
DYNAMIC PERFORMANCE
Output Voltage Settling Time
10
10
10
µs typ
Full-Scale Change to ±1/2 LSB. DAC Latch Contents
Alternately Loaded with All 0s and All 1s
Measured with VREF(+) = VREF(–) = 0 V. DAC Latch
Alternately Loaded with All 0s and All 1s
See Terminology
See Terminology; Applies to the AD7835 Only
See Terminology
Feedthrough to DAC Output Under Test Due to
Change in Digital Input Code to Another Converter
Effect of Input Bus Activity on DAC Output Under Test
Digital-to-Analog Glitch Impulse
120
120
120
nV-s typ
DC Output Impedance
Channel-to-Channel Isolation
DAC to DAC Crosstalk
Digital Crosstalk
0.5
100
25
3
0.5
100
25
3
0.5
100
25
3
Ω typ
dB typ
nV-s typ
nV-s typ
Digital Feedthrough – AD7834
Digital Feedthrough – AD7834
Output Noise Spectral Density
@ 1 kHz
0.2
0.1
0.2
0.1
0.2
0.1
nV-s typ
nV-s typ
40
40
40
nV/√Hz typ All 1s Loaded to DAC. VREF(+) = VREF(–) = 0 V
NOTES
1Temperature range is as follows: A Version: –40°C to +85°C; B Version: –40°C to +85°C; S Version: –55°C to +125°C.
2Guaranteed by design.
Specifications subject to change without notice
–2–
REV. A