3 V/5 V, 2 MSPS, 8-Bit, 1-/4-/8-Channel
Sampling ADCs
AD7822/AD7825/AD7829
FUNCTIONAL BLOCK DIAGRAM
FEATURES
V
1
1
2
3
8-bit half-flash ADC with 420 ns conversion time
One, four, and eight single-ended analog input channels
Available with input offset adjust
On-chip track-and-hold
DD
CONVST EOC A0 A1 A2 PD
CONTROL
LOGIC
COMP
2.5V
REF
SNR performance given for input frequencies up to 10 MHz
On-chip reference (2.5 V)
V
IN1
4
V
BUF
V
REF IN/OUT
IN2
4
4
5
5
5
5
Automatic power-down at the end of conversion
Wide operating supply range
3 V 10% and 5 V 10%
Input ranges
0 V to 2 V p-p, VDD = 3 V 10%
V
V
V
V
V
V
IN3
IN4
IN5
IN6
IN7
IN8
8-BIT
INPUT
MUX
HALF
FLASH
ADC
T/H
DB7
DB0
PARALLEL
PORT
V
MID
0 V to 2.5 V p-p, VDD = 5 V 10%
AGND DGND
CS RD
EOC
Flexible parallel interface with
standalone operation
pulse to allow
1
2
3
4
5
A0, A1
A2
PD
AD7825/AD7829
AD7829
AD7822/AD7825
AD7825/AD7829
AD7829
V
V
TO V
TO V
IN2
IN5
IN4
IN8
APPLICATIONS
Data acquisition systems, DSP front ends
Disk drives
Figure 1.
Mobile communication systems, subsampling
applications
GENERAL DESCRIPTION
The AD7822 and AD7825 are available in 20-lead and 24-lead,
0.3" wide, plastic dual in-line packages (PDIP); 20-lead and
24-lead standard small outline packages (SOIC); and 20-lead
and 24-lead thin shrink small outline packages (TSSOP). The
AD7829 is available in a 28-lead, 0.6" wide PDIP; a 28-lead
SOIC; and a 28-lead TSSOP.
The AD7822/AD7825/AD7829 are high speed, 1-, 4-, and
8-channel, microprocessor-compatible, 8-bit analog-to-digital
converters with a maximum throughput of 2 MSPS. The AD7822/
AD7825/AD7829 contain an on-chip reference of 2.5 V
(2% tolerance); a track-and-hold amplifier; a 420 ns, 8-bit half-
flash ADC; and a high speed parallel interface. The converters
can operate from a single 3 V 10% and 5 V 10% supply.
PRODUCT HIGHLIGHTS
1. Fast Conversion Time. The AD7822/AD7825/AD7829
have a conversion time of 420 ns. Faster conversion times
maximize the DSP processing time in a real-time system.
The AD7822/AD7825/AD7829 combine the convert start and
CONVST
power-down functions at one pin, that is, the
pin.
This allows a unique automatic power-down at the end of a
CONVST
conversion to be implemented. The logic level on the
pin is sampled after the end of a conversion when an
2. Analog Input Span Adjustment. The VMID pin allows the
user to offset the input span. This feature can reduce the
requirements of single-supply op amps and take into
account any system offsets.
EOC
(end
of conversion) signal goes high. If it is logic low at that point,
the ADC is powered down. The AD7822 and AD7825 also have
a separate power-down pin (see the Operating Modes section).
3. FPBW (Full Power Bandwidth) of Track-and-Hold.
The track-and-hold amplifier has an excellent high
frequency performance. The AD7822/AD7825/AD7829
are capable of converting full-scale input signals up to a
frequency of 10 MHz. This makes the parts ideally suited
to subsampling applications.
The parallel interface is designed to allow easy interfacing to
microprocessors and DSPs. Using only address decoding logic,
the parts are easily mapped into the microprocessor address
EOC
space. The
pulse allows the ADCs to be used in a stand-
alone manner (see the Parallel Interface section.)
4. Channel Selection. Channel selection is made without the
necessity of writing to the part.
Rev. C
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registeredtrademarks arethe property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
www.analog.com
©2006 Analog Devices, Inc. All rights reserved.
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