PRELIMINARY TECHNICAL DATA
Low Cost, Low Power
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Preliminary Technical Data
Stereo Audio Codec
AD74122
GENERAL DESCRIPTION
FEATURES
2.5V Stereo Audio Codec with 3.3 V Tolerant Digital Inter-
face
The AD74122 is a front-end processor for general purpose
audio and voice applications. It features two multi-bit Σ∆ A/D
conversion channels and two multi-bit Σ∆ D/A conversion chan-
nels. The ADC channels provide >70 dB SNR and the DAC
channels provide >80dB SNR both over an audio signal band-
width.
Supports 8kHz to 48 kHz Sample Rates
Supports 16/20/24-Bit Word Lengths
Multibit Sigma Delta Modulators with
“Perfect Differential Linearity Restoration” for
Reduced Idle Tones and Noise Floor
Data Directed Scrambling DACs - Least Sensitive to Jitter
Performance (20 Hz to 20 kHz)
The AD74122 is particularly suitable for a variety of applica-
tions where stereo input and output channels are required,
including audio sections of Digital Video Camcorders, portable
personal audio devices and telematic applications. Its high qual-
ity performance also make it suitable for speech and telephony
applications such as speech recognition and synthesis and mod-
ern feature phones.
85 dB ADC Dynamic Range
93 dB DAC Dynamic Range
Digitally Programmable Input/Output Gain
On-chip Volume Controls Per Output Channel
Software Controllable Clickless Mute
Supports 256xFs, 512xFs and 768xFs Master Mode Clocks
Master Clock Pre-Scaler for use with DSP master clocks
On-Chip Reference
An on-chip reference voltage is included but can be
overdriven by an external reference source if required.
The AD74122 offers sampling rates which, depending on
MCLK selection and MCLK divider ratio, range from 8 kHz in
the voiceband range to 48 kHz in the audio range.
20-Lead TSSOP Package
APPLICATIONS
The AD74122 is available in 20 lead TSSOP package option
and is specified for the automotive temperature range of -40°C
to +105°C.
Digital Video Camcorders (DVC)
Portable Audio Devices (Walkman, PDAs etc.)
Audio Processing
Voice Processing
Telematic Systems
General Purpose Analog I/O
FUNCTIONAL BLOCK DIAGRAM
RESET
MCLK
DVDD1
DVDD2
AVDD
LEFT ADC
CAPPL
DIN
DOUT
DFS
DIGITAL
FILTER
Σ−∆ ADC
MODULATOR
Gain
Stage
VINL
SERIAL
DATA
PORT
CAPNL
CAPPR
DCLK
RIGHT ADC
DIGITAL
FILTER
Σ−∆ ADC
MODULATOR
Gain
Stage
VINR
CAPNR
LEFT DAC
DIGITAL
FILTER
VOLUME
CONTROL
Σ−∆ DAC
MODULATOR
VOUTL
VOUTR
RIGHT DAC
REFERENCE
DIGITAL
FILTER
VOLUME
CONTROL
Σ−∆ DAC
MODULATOR
AGND
DGND
REFCAP
REV. PrG 1/03
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
Fax: 781/326-8703
World Wide Web Site: http://www.analog.com
Analog Devices, Inc., 2003