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AD7376ARUZ100-R7 PDF预览

AD7376ARUZ100-R7

更新时间: 2024-01-22 17:59:05
品牌 Logo 应用领域
亚德诺 - ADI 数字电位计
页数 文件大小 规格书
20页 452K
描述
128-Position Digital Potentiometer

AD7376ARUZ100-R7 数据手册

 浏览型号AD7376ARUZ100-R7的Datasheet PDF文件第14页浏览型号AD7376ARUZ100-R7的Datasheet PDF文件第15页浏览型号AD7376ARUZ100-R7的Datasheet PDF文件第16页浏览型号AD7376ARUZ100-R7的Datasheet PDF文件第18页浏览型号AD7376ARUZ100-R7的Datasheet PDF文件第19页浏览型号AD7376ARUZ100-R7的Datasheet PDF文件第20页 
AD7376  
In Figure 34, the lower trace shows that the volume level  
changes from a quarter scale to full scale when a signal change  
occurs near the zero-crossing window.  
AUDIO VOLUME CONTROL  
Because of its good THD performance and high voltage  
capability, the AD7376 can be used for digital volume control. If  
AD7376 is used directly as an audio attenuator or gain amplifier,  
a large step change in the volume level at any arbitrary time can  
lead to an abrupt discontinuity of the audio signal, causing an  
audible zipper noise. To prevent this, a zero-crossing window  
The AD7376 shutdown sleep-mode programming feature can  
SHDN  
be used to mute the device at power-up by holding  
and programming zero scale.  
low  
CS  
detector can be inserted to the  
line to delay the device  
update until the audio signal crosses the window. Since the  
input signal can operate on top of any dc levels rather than  
absolute zero volt level, zero-crossing, in this case, means the  
signal is ac-coupled and the dc offset level is the signal zero  
reference point.  
1
The configuration to reduce zipper noise and the result of using  
this configuration are shown in Figure 35 and Figure 34,  
respectively. The input is ac-coupled by C1 and attenuated  
down before feeding into the window comparator formed by  
U2, U3, and U4B. U6 is used to establish the signal zero  
reference. The upper limit of the comparator is set above its  
offset and, therefore, the output pulses high whenever the input  
falls between 2.502 V and 2.497 V (or 0.005 V window) in this  
example. This output is ANDed with the chip select signal such  
that the AD7376 updates whenever the signal crosses the  
window. To avoid constant update of the device, the chip select  
signal should be programmed as two pulses, rather than the one  
shown in Figure 2.  
2
CHANNEL 1  
FREQ = 20.25kHz  
1.03V p-p  
NOTES  
1. THE LOWER TRACE SHOWS THAT THE VOLUME LEVEL  
CHANGES FROM QUARTER SCALE TO FULL SCALE, WITH THE  
CHANGE OCCURRING NEAR THE ZERO-CROSSING WINDOW.  
Figure 34. Input (Trace 1) and Output (Trace 2) of the Circuit in Figure 35  
V
C1  
IN  
1µF  
+5V  
U1  
+15V  
R1  
+5V  
V
DD  
100kΩ  
C3  
0.1µF  
A
AD7376  
U2  
V+  
C2  
0.1µF  
ADCM371  
V–  
R2  
200Ω  
+15V  
R4  
90kΩ  
V
SS  
W
–15V  
U4A  
U5  
V+  
U4B  
V
4
5
100kΩ  
OUT  
6
1
2
+5V  
7408  
7408  
CS  
R5  
10kΩ  
V–  
U3  
V+  
+5V  
CLK  
SDI  
CLK  
SDI  
ADCM371  
V–  
B
–15V  
U6  
V+  
CS  
GND  
R3  
100Ω  
AD8541  
V–  
Figure 35. Audio Volume Control with Zipper Noise Reduction  
Rev. D | Page 17 of 20  
 
 
 

AD7376ARUZ100-R7 替代型号

型号 品牌 替代类型 描述 数据表
AD7376ARUZ100-R7 ADI

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128-Position Digital Potentiometer
AD7376ARUZ100 ADI

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128-Position Digital Potentiometer

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