AD73311
AD73311A
Typ
Parameter
Min
Max
Unit
Test Conditions/Comments
DAC SPECIFICATIONS (Continued)
Power Supply Rejection
–55
25
dB
µs
Input Signal Level at AVDD and DVDD
Pins: 1.0 kHz, 100 mV p-p Sine Wave
64 kHz Input Sample Rate, Interpolator
Bypassed (CRE:5 = 1)
Group Delay4, 5
Output DC Offset2, 7
Minimum Load Resistance, RL
+30
mV
PGA = 6 dB
2, 8
Single-Ended
Differential
Maximum Load Capacitance, CL
150
150
Ω
Ω
2, 8
Single-Ended
Differential
500
100
pF
pF
FREQUENCY RESPONSE
(ADC AND DAC)9 Typical Output
0 Hz
0
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
2000 Hz
4000 Hz
8000 Hz
12000 Hz
16000 Hz
20000 Hz
24000 Hz
28000 Hz
> 32000 Hz
–0.1
–0.25
–0.6
–1.4
–2.8
–4.5
–7.0
–9.5
< –12.5
Channel Frequency Response Is
Programmable by Means of External
Digital Filtering
LOGIC INPUTS
V
INH, Input High Voltage
VDD – 0.8
0
VDD
0.8
V
V
µA
pF
VINL, Input Low Voltage
IIH, Input Current
CIN, Input Capacitance
–0.5
10
LOGIC OUTPUT
V
OH, Output High Voltage
VDD – 0.4
0
VDD
0.4
V
V
µA
|IOUT| < 100 µA
|IOUT| < 100 µA
VOL, Output Low Voltage
Three-State Leakage Current
–0.3
POWER SUPPLIES
AVDD1, AVDD2
DVDD
4.5
4.5
5.5
5.5
V
V
10
IDD
See Table II
N
OTES
1Operating temperature range is as follows: –40°C to +85°C. Therefore, TMIN = –40°C and TMAX = +85°C.
2Test conditions: Input PGA set for 0 dB gain, Output PGA set for 6 dB gain, no load on analog outputs (unless otherwise stated).
3At input to sigma-delta modulator of ADC.
4Guaranteed by design.
5Overall group delay will be affected by the sample rate and the external digital filtering.
6The ADC’s input impedance is inversely proportional to DMCLK and is approximated by: (4 × 1011)/DMCLK.
7Between VOUTP and VOUTN.
8At VOUT output.
9Frequency responses of ADC and DAC measured with input at audio reference level (the input level that produces an output level of –10 dBm0), with 38 dB preamplifier
bypassed and input gain of 0 dB.
10Test conditions: no load on digital inputs, analog inputs ac coupled to ground, no load on analog outputs.
Specifications subject to change without notice.
REV. B
–5–