AD7278

更新时间： 2024-02-18 21:04:02

阅读下载

获取价格

如果您发现信息不准确，欢迎纠错

AD7278 技术参数

是否无铅：	不含铅	是否Rohs认证：	符合
生命周期：	Active	零件包装代码：	TSSOP
包装说明：	TSSOP,	针数：	8
Reach Compliance Code：	unknown	风险等级：	5.68
Is Samacsys：	N	最大模拟输入电压：	3.6 V
最小模拟输入电压：		最长转换时间：	0.291 µs
转换器类型：	ADC, SUCCESSIVE APPROXIMATION	JESD-30 代码：	S-PDSO-G8
JESD-609代码：	e3	长度：	3 mm
最大线性误差 (EL)：	0.3906%	湿度敏感等级：	1
模拟输入通道数量：	1	位数：	8
功能数量：	1	端子数量：	8
最高工作温度：	125 °C	最低工作温度：	-40 °C
输出位码：	BINARY	输出格式：	SERIAL
封装主体材料：	PLASTIC/EPOXY	封装代码：	TSSOP
封装形状：	SQUARE	封装形式：	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度（摄氏度）：	260	采样速率：	3 MHz
采样并保持/跟踪并保持：	TRACK	座面最大高度：	1.1 mm
标称供电电压：	3 V	表面贴装：	YES
温度等级：	AUTOMOTIVE	端子面层：	MATTE TIN
端子形式：	GULL WING	端子节距：	0.65 mm
端子位置：	DUAL	处于峰值回流温度下的最长时间：	40
宽度：	3 mm	Base Number Matches：	1

PRELIMINARYTECHNICALDATA

Preliminary Technical Data

AD7276/AD7277/AD7278

PIN FUNCTION DESCRIPTION

Mnemonic

Function

C S

Chip Select. Active low logic input. This input provides the dual function of initiating

conversion on the AD7276/AD7277/AD7278 and also frames the serial data transfer.

Power Supply Input. The V_DDrange for the AD7276/AD7277/AD7278 is from +2.35V to

+3.6V.

V_{D D}

GND

Analog Ground. Ground reference point for all circuitry on the AD7276/AD7277/AD7278.

All analog input signals should be referred to this GND voltage.

V_IN

Analog Input. Single-ended analog input channel. The input range is 0 to V_DD.

SDATA

Data Out. Logic Output. The conversion result from the AD7276/AD7277/AD7278 is pro-

vided on this output as a serial data stream. The bits are clocked out on the falling edge of

the SCLK input. The data stream from the AD7276 consists of two leading zeros followed

by the 12 bits of conversion data followed by two trailing zeros, which is provided MSB

first. The data stream from the AD7277 consists of two leading zeros followed by the 10 bits

of conversion data followed by four trailing zeros, which is provided MSB first. The data

stream from the AD7278 consists of two leading zeros followed by the 8 bits of conversion

data followed by six trailing zeros, which is provided MSB first.

SCLK

Serial Clock. Logic input. SCLK provides the serial clock for accessing data from the part.

This clock input is also used as the clock source for the AD7276/AD7277/AD7278's conver-

sion process.

REV. PrF

–8–

1...5 6 789 10 11...20

下载PDF