AD7150

更新时间： 2024-01-03 17:15:04

品牌	Logo	应用领域
亚德诺 - ADI		转换器
页数	文件大小	规格书
24页	258K
描述
Ultra Low Power, 2 Channel, Capacitance Converter for Proximity Sensing

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AD7150 技术参数

是否无铅：	含铅	是否Rohs认证：	符合
生命周期：	Active	零件包装代码：	TSSOP
包装说明：	TSSOP,	针数：	10
Reach Compliance Code：	compliant	ECCN代码：	EAR99
HTS代码：	8542.39.00.01	风险等级：	0.77
Is Samacsys：	N	商用集成电路类型：	CONSUMER CIRCUIT
JESD-30 代码：	S-PDSO-G10	JESD-609代码：	e3
长度：	3 mm	湿度敏感等级：	1
功能数量：	1	端子数量：	10
最高工作温度：	85 °C	最低工作温度：	-40 °C
封装主体材料：	PLASTIC/EPOXY	封装代码：	TSSOP
封装形状：	SQUARE	封装形式：	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度（摄氏度）：	260	认证状态：	Not Qualified
座面最大高度：	1.1 mm	最大供电电压 (Vsup)：	3.6 V
最小供电电压 (Vsup)：	2.7 V	表面贴装：	YES
温度等级：	INDUSTRIAL	端子面层：	Matte Tin (Sn)
端子形式：	GULL WING	端子节距：	0.5 mm
端子位置：	DUAL	处于峰值回流温度下的最长时间：	30
宽度：	3 mm	Base Number Matches：	1

AD7150 数据手册

AD7150

Preliminary Technical Data

TABLE OF CONTENTS

Preliminary Specifications............................................................... 3

Timing Specifications....................................................................... 4

Absolute Maximum Ratings............................................................ 5

Pin Configurations and Function Descriptions ........................... 6

Typical Performance Characteristics ............................................. 7

Architecture and Main Features ..................................................... 8

Overview........................................................................................ 8

Capacitance to Digital Converter............................................... 8

CAPDAC ....................................................................................... 8

Comparator and Threshold Modes............................................ 9

Adaptive Threshold...................................................................... 9

Data Average ................................................................................. 9

Sensitivity .................................................................................... 10

Hysteresis..................................................................................... 10

Timeout........................................................................................ 10

Auto CAPDAC adjustment....................................................... 10

Power Down Timer.................................................................... 10

Status Register............................................................................. 12

Data Registers ............................................................................. 12

Average Registers........................................................................ 12

Fixed Threshold Registers......................................................... 12

Sensitivity Registers ................................................................... 13

Timeout Registers....................................................................... 13

Setup Registers............................................................................ 14

Configuration Register .............................................................. 15

Power Down Timer Register .................................................... 16

Cap DAC B Registers................................................................. 16

Serial Number Registers............................................................ 16

Chip ID Registers ....................................................................... 16

Serial Interface ................................................................................ 17

Read Operation .......................................................................... 17

Write Operation.......................................................................... 17

AD7150 Reset ............................................................................. 18

General Call ................................................................................ 18

Hardware Design Considerations ................................................ 19

Overview ..................................................................................... 19

Parasitic Capacitance to Ground.............................................. 19

Parasitic Resistance To Ground................................................ 19

Parasitic Parallel Resistance ...................................................... 19

Parasitic Serial Resistance ......................................................... 20

Input Overvoltage Protection................................................... 20

Input EMC Protection ............................................................... 20

Application Examples ................................................................ 21

REVISION HISTORY

Pre-Release Preliminary Datasheet

Rev. PrD | Page 2 of 24

123 4 5 6 7...24

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