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AD626A PDF预览

AD626A

更新时间: 2024-02-11 04:08:38
品牌 Logo 应用领域
亚德诺 - ADI 放大器
页数 文件大小 规格书
12页 169K
描述
Low Cost, Single Supply Differential Amplifier

AD626A 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:DIP
包装说明:DIP,针数:8
Reach Compliance Code:unknown风险等级:5.4
放大器类型:INSTRUMENTATION AMPLIFIER标称带宽 (3dB):0.1 MHz
最小共模抑制比:55 dB最大输入失调电压:2500 µV
JESD-30 代码:R-PDIP-T8JESD-609代码:e3
长度:9.88 mm湿度敏感等级:NOT APPLICABLE
负供电电压上限:-18 V标称负供电电压 (Vsup):-5 V
最大非线性:0.015%功能数量:1
端子数量:8最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:DIP封装形状:RECTANGULAR
封装形式:IN-LINE峰值回流温度(摄氏度):NOT APPLICABLE
认证状态:COMMERCIAL座面最大高度:5.33 mm
标称压摆率:0.22 V/us子类别:Instrumentation Amplifier
供电电压上限:18 V标称供电电压 (Vsup):5 V
表面贴装:NO温度等级:INDUSTRIAL
端子面层:MATTE TIN端子形式:THROUGH-HOLE
端子节距:2.54 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT APPLICABLE最大电压增益:100
最小电压增益:10标称电压增益:100
宽度:7.62 mmBase Number Matches:1

AD626A 数据手册

 浏览型号AD626A的Datasheet PDF文件第6页浏览型号AD626A的Datasheet PDF文件第7页浏览型号AD626A的Datasheet PDF文件第8页浏览型号AD626A的Datasheet PDF文件第10页浏览型号AD626A的Datasheet PDF文件第11页浏览型号AD626A的Datasheet PDF文件第12页 
AD626  
ERROR  
OUT  
10k⍀  
10k⍀  
100  
90  
2k⍀  
+V  
S
10k⍀  
INPUT  
20V p–p  
AD626  
1k⍀  
10  
–V  
S
0%  
Figure 27. Settling Time Test Circuit  
THEORY OF OPERATION  
Figure 25. Settling Time. VS = +5 V, G = 10  
The AD626 is a differential amplifier consisting of a precision  
balanced attenuator, a very low drift preamplifier (A1), and an  
output buffer amplifier (A2). It has been designed so that small  
differential signals can be accurately amplified and filtered in the  
presence of large common-mode voltages (VCM), without the  
use of any other active components.  
100  
90  
Figure 28 shows the main elements of the AD626. The signal  
inputs at Pins 1 and 8 are first applied to dual resistive attenuators  
R1 through R4 whose purpose is to reduce the peak common-  
mode voltage at the input to the preamplifier—a feedback stage  
based on the very low drift op amp A1. This allows the differen-  
tial input voltage to be accurately amplified in the presence of  
large common-mode voltages six times greater than that which  
can be tolerated by the actual input to A1. As a result, the input  
CMR extends to six times the quantity (VS – 1 V). The overall  
common-mode error is minimized by precise laser-trimming of  
R3 and R4, thus giving the AD626 a common-mode rejection  
ratio (CMRR) of at least 10,000:1 (80 dB).  
10  
0%  
Figure 26. Settling Time. VS = +5 V, G = 100  
To minimize the effect of spurious RF signals at the inputs due  
to rectification at the input to A1, small filter capacitors C1 and  
C2 are included.  
+V  
S
FILTER  
C1  
5pF  
AD626  
R1  
200k⍀  
R12  
100k⍀  
+IN  
–IN  
A1  
A2  
OUT  
R2  
200k⍀  
C2  
5pF  
R17  
95k⍀  
R3  
41k⍀  
R4  
41k⍀  
R15  
10k⍀  
R9  
10k⍀  
R5  
4.2k⍀  
R7  
500⍀  
R10  
10k⍀  
R13  
10k⍀  
R8  
10k⍀  
R14  
555⍀  
R11  
10k⍀  
R6  
500⍀  
GAIN = 100  
–V  
GND  
S
Figure 28. Simplified Schematic  
REV. C  
–9–  

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