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AD625SE/883B PDF预览

AD625SE/883B

更新时间： 2024-01-04 23:00:42
品牌 Logo 应用领域
罗彻斯特 - ROCHESTER 放大器
页数 文件大小 规格书
16页 1146K
描述
INSTRUMENTATION AMPLIFIER, 200 uV OFFSET-MAX, 0.65 MHz BAND WIDTH, PQCC20, LCC-20

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AD625SE/883B 技术参数

Source Url Status Check Date：2013-05-01 14:56:15.436是否无铅： 含铅
是否Rohs认证： 不符合生命周期：Active
零件包装代码：QLCC包装说明：QCCN, LCC20,.35SQ
针数：20Reach Compliance Code：not_compliant
ECCN代码：EAR99HTS代码：8542.31.00.01
风险等级：5.27放大器类型：INSTRUMENTATION AMPLIFIER
最大平均偏置电流 (IIB)：0.05 µA标称带宽 (3dB)：0.65 MHz
最小共模抑制比：70 dB最大输入失调电流 (IIO)：0.035 µA
最大输入失调电压：200 µVJESD-30 代码：S-PQCC-N20
JESD-609代码：e0长度：8.89 mm
负供电电压上限：-18 V标称负供电电压 (Vsup)：-15 V
最大非线性：0.01%功能数量：1
端子数量：20最高工作温度：125 °C
最低工作温度：-55 °C封装主体材料：PLASTIC/EPOXY
封装代码：QCCN封装等效代码：LCC20,.35SQ
封装形状：SQUARE封装形式：CHIP CARRIER
峰值回流温度（摄氏度）：NOT APPLICABLE电源：+-15 V
认证状态：Not Qualified筛选级别：MIL-STD-883 Class B
座面最大高度：2.54 mm标称压摆率：5 V/us
子类别：Instrumentation Amplifier最大压摆率：5 mA
供电电压上限：18 V标称供电电压 (Vsup)：15 V
表面贴装：YES技术：BIPOLAR
温度等级：MILITARY端子面层：Tin/Lead (Sn/Pb)
端子形式：NO LEAD端子节距：1.27 mm
端子位置：QUAD处于峰值回流温度下的最长时间：NOT APPLICABLE
最大电压增益：10000最小电压增益：1
标称电压增益：10宽度：8.89 mm
Base Number Matches：1

AD625SE/883B 数据手册

 浏览型号AD625SE/883B的Datasheet PDF文件第10页浏览型号AD625SE/883B的Datasheet PDF文件第11页浏览型号AD625SE/883B的Datasheet PDF文件第12页浏览型号AD625SE/883B的Datasheet PDF文件第13页浏览型号AD625SE/883B的Datasheet PDF文件第14页浏览型号AD625SE/883B的Datasheet PDF文件第16页 
AD625  
1000  
3) Begin all calculations with G0 = 1 and RF0 = 0.  
RF1 = (20 kΩ – RF0) (1–1/4): RF0 = 0 ∴ RF1 = 15 kΩ  
RF2 = [20 kΩ – (RF0 + RF1)] (1–4/16):  
800  
400  
200  
R
= 1kꢀ  
ON  
RF0 + RF1 = 15 kΩ ∴ RF2 = 3.75 kΩ  
100  
80  
R
= 500ꢀ  
ON  
RF3 = [20 kΩ – (RF0 + RF1 + RF2)] (1–16/64):  
RF0 + RF1 + RF2 = 18.75 kΩ ∴ RF3 = 937.5 Ω  
40  
20  
R
= 200ꢀ  
ON  
4) The center resistor (RG of the highest gain setting), is deter-  
mined last. Its value is the remaining resistance of the 40 kΩ  
string, and can be calculated with the equation:  
10  
8
R
= 0ꢀ  
ON  
4
2
1
M
RG = (40 kΩ – 2 RF  
)
∑
j
1
4
16  
64  
GAIN  
256  
1024  
4096  
j = 0  
RG = 40 kΩ – 2 (RF + RF + RF RF )  
3
+
0
1
2
40 kΩ – 39.375 kΩ = 625 Ω  
Figure 40. Time to 0.01% of a 20 V Step Input for  
SPGA with AD625  
5) If different resistor values are desired, all the resistors in the  
network can be scaled by some convenient factor. However,  
raising the impedance will increase the RTO errors, lowering  
the total network resistance below 20 kΩ can result in ampli-  
fier instability. More information on this phenomenon is  
given in the RPGA section of the data sheet. The scale factor  
will not affect the unity gain feedback resistors. The resistor  
network in Figure 38 has a scaling factor of 650/625 = 1.04,  
if this factor is used on RF1, RF2, RF3, and RG, then the resis-  
tor values will match exactly.  
DETERMINING SPGA RESISTOR NETWORK VALUES  
The individual resistors in the gain network can be calculated  
sequentially using the formula given below. The equation deter-  
mines the resistors as labeled in Figure 41. The feedback resis-  
tors and the gain setting resistors are interactive, therefore; the  
formula must be a series where the present term is dependent on  
the preceding term(s). The formula  
1
Gi  
G0 = 1  
RF  
= (20 kΩ –  
RFj ) (1 –  
)
∑
i +1  
6) Round off errors can be cumulative, therefore, it is advised to  
carry as many significant digits as possible until all the values  
have been calculated.  
RF = 0  
0
Gi =1  
j = 0  
can be used to calculate the necessary feedback resistors for any  
set of gains. This formula yields a network with a total resistance  
of 40 kΩ. A dummy variable (j) serves as a counter to keep a  
running total of the preceding feedback resistors. To illustrate  
how the formula can be applied, an example similar to the  
calculation used for the resistor network in Figure 38 is exam-  
ined below.  
AD75xx  
TO GAIN SENSE  
(PIN 2)  
TO GAIN SENSE  
(PIN 15)  
RF  
2
RF  
N
RF  
G
RF  
N
RF  
2
20kꢀ  
RF  
20kꢀ  
1
1) Unity gain is treated as a separate case. It is implemented  
with separate 20 kΩ feedback resistors as shown in Figure 41.  
It is then ignored in further calculations.  
CONNECT IF UNITY  
GAIN IS DESIRED  
CONNECT IF UNITY  
GAIN IS DESIRED  
TO GAIN DRIVE  
(PIN 5)  
TO GAIN DRIVE  
(PIN 12)  
2) Before making any calculations it is advised to draw a resistor  
network similar to the network in Figure 41. The network  
will have (2 × M) + 1 resistors, where M = number of gains.  
For Figure 38 M = 3 (4, 16, 64), therefore, the resistor string  
will have seven resistors (plus the two 20 kΩ “side” resistors  
for unity gain).  
Figure 41. Resistors for a Gain Setting Network  
–14–  
REV. D  
1...1213141516

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