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AD624ACHIPS

更新时间： 2024-01-23 08:46:37
品牌 Logo 应用领域
亚德诺 - ADI 仪表放大器放大器电路
页数 文件大小 规格书
15页 694K
描述
Precision Instrumentation Amplifier

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AD624ACHIPS 技术参数

是否无铅： 含铅是否Rohs认证： 不符合
生命周期：Active零件包装代码：DIP
包装说明：DIP,针数：16
Reach Compliance Code：unknown风险等级：5.78
放大器类型：INSTRUMENTATION AMPLIFIER最大平均偏置电流 (IIB)：0.05 µA
标称带宽 (3dB)：1 MHz最小共模抑制比：70 dB
最大输入失调电流 (IIO)：0.035 µA最大输入失调电压：75 µV
JESD-30 代码：R-CDIP-T16JESD-609代码：e0
长度：19.05 mm湿度敏感等级：NOT SPECIFIED
负供电电压上限：-18 V标称负供电电压 (Vsup)：-15 V
最大非线性：0.005%功能数量：1
端子数量：16最高工作温度：125 °C
最低工作温度：-55 °C封装主体材料：CERAMIC, METAL-SEALED COFIRED
封装代码：DIP封装形状：RECTANGULAR
封装形式：IN-LINE峰值回流温度（摄氏度）：NOT SPECIFIED
认证状态：COMMERCIAL座面最大高度：5.08 mm
标称压摆率：5 V/us子类别：Instrumentation Amplifier
供电电压上限：18 V标称供电电压 (Vsup)：15 V
表面贴装：NO温度等级：MILITARY
端子面层：TIN LEAD端子形式：THROUGH-HOLE
端子节距：2.54 mm端子位置：DUAL
处于峰值回流温度下的最长时间：NOT SPECIFIED最大电压增益：1000
最小电压增益：1标称电压增益：1000
宽度：7.62 mmBase Number Matches：1

AD624ACHIPS 数据手册

 浏览型号AD624ACHIPS的Datasheet PDF文件第6页浏览型号AD624ACHIPS的Datasheet PDF文件第7页浏览型号AD624ACHIPS的Datasheet PDF文件第8页浏览型号AD624ACHIPS的Datasheet PDF文件第10页浏览型号AD624ACHIPS的Datasheet PDF文件第11页浏览型号AD624ACHIPS的Datasheet PDF文件第12页 
AD624  
+V  
S
NOISE  
The AD624 is designed to provide noise performance near the  
theoretical noise floor. This is an extremely important design  
criteria as the front end noise of an instrumentation amplifier is  
the ultimate limitation on the resolution of the data acquisition  
system it is being used in. There are two sources of noise in an  
instrument amplifier, the input noise, predominantly generated  
by the differential input stage, and the output noise, generated  
by the output amplifier. Both of these components are present  
at the input (and output) of the instrumentation amplifier. At  
the input, the input noise will appear unaltered; the output  
noise will be attenuated by the closed loop gain (at the output,  
the output noise will be unaltered; the input noise will be ampli-  
fied by the closed loop gain). Those two noise sources must be  
root sum squared to determine the total noise level expected at  
the input (or output).  
AD624  
LOAD  
TO  
–V  
S
POWER  
SUPPLY  
GROUND  
c. AC-Coupled  
Figure 31. Indirect Ground Returns for Bias Currents  
Although instrumentation amplifiers have differential inputs,  
there must be a return path for the bias currents. If this is not  
provided, those currents will charge stray capacitances, causing  
the output to drift uncontrollably or to saturate. Therefore,  
when amplifying “floating” input sources such as transformers  
and thermocouples, as well as ac-coupled sources, there must  
still be a dc path from each input to ground, (see Figure 31).  
The low frequency (0.1 Hz to 10 Hz) voltage noise due to the  
output stage is 10 µV p-p, the contribution of the input stage is  
0.2 µV p-p. At a gain of 10, the RTI voltage noise would be  
2
2
)
10  
G
+ 0.2  
(
1 µV p-p,  
. The RTO voltage noise would be  
COMMON-MODE REJECTION  
Common-mode rejection is a measure of the change in output  
voltage when both inputs are changed by equal amounts. These  
specifications are usually given for a full-range input voltage  
change and a specified source imbalance. “Common-Mode  
Rejection Ratio” (CMRR) is a ratio expression while “Common-  
Mode Rejection” (CMR) is the logarithm of that ratio. For  
example, a CMRR of 10,000 corresponds to a CMR of 80 dB.  
2
)
102 + 0.2 G  
10.2 µV p-p,  
. These calculations hold for  
(
)
(
applications using either internal or external gain resistors.  
INPUT BIAS CURRENTS  
Input bias currents are those currents necessary to bias the input  
transistors of a dc amplifier. Bias currents are an additional  
source of input error and must be considered in a total error  
budget. The bias currents when multiplied by the source resis-  
tance imbalance appear as an additional offset voltage. (What is  
of concern in calculating bias current errors is the change in bias  
current with respect to signal voltage and temperature.) Input  
offset current is the difference between the two input bias cur-  
rents. The effect of offset current is an input offset voltage whose  
magnitude is the offset current times the source resistance.  
In an instrumentation amplifier, ac common-mode rejection is  
only as good as the differential phase shift. Degradation of ac  
common-mode rejection is caused by unequal drops across  
differing track resistances and a differential phase shift due to  
varied stray capacitances or cable capacitances. In many appli-  
cations shielded cables are used to minimize noise. This tech-  
nique can create common-mode rejection errors unless the  
shield is properly driven. Figures 32 and 33 shows active data  
guards which are configured to improve ac common-mode  
rejection by “bootstrapping” the capacitances of the input  
cabling, thus minimizing differential phase shift.  
+V  
S
+V  
S
–INPUT  
G = 200  
AD624  
LOAD  
100⍀  
AD711  
V
AD624  
OUT  
RG  
2
TO  
–V  
S
POWER  
SUPPLY  
GROUND  
REFERENCE  
+INPUT  
–V  
S
a. Transformer Coupled  
Figure 32. Shield Driver, G ≥ 100  
+V  
S
+V  
S
–INPUT  
RG  
1
AD712  
100⍀  
100⍀  
AD624  
V
AD624  
OUT  
LOAD  
RG  
–V  
S
2
REFERENCE  
+INPUT  
TO  
–V  
S
POWER  
SUPPLY  
GROUND  
–V  
S
Figure 33. Differential Shield Driver  
b. Thermocouple  
REV. C  
–9–  
1...6789101112...15

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