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AD5750BCPZ-REEL PDF预览

AD5750BCPZ-REEL

更新时间: 2024-02-14 04:21:24
品牌 Logo 应用领域
亚德诺 - ADI 驱动器
页数 文件大小 规格书
36页 695K
描述
Industrial Current/Voltage Output Driver with Programmable Ranges

AD5750BCPZ-REEL 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:QFN
包装说明:HVQCCN, LCC32,.2SQ,20针数:32
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.04
内置保护:TRANSIENT; OVER CURRENT接口集成电路类型:BUFFER OR INVERTER BASED PERIPHERAL DRIVER
JESD-30 代码:S-XQCC-N32JESD-609代码:e3
长度:5 mm湿度敏感等级:1
功能数量:1端子数量:32
最高工作温度:105 °C最低工作温度:-40 °C
输出电流流向:SOURCE AND SINK标称输出峰值电流:0.015 A
封装主体材料:UNSPECIFIED封装代码:HVQCCN
封装等效代码:LCC32,.2SQ,20封装形状:SQUARE
封装形式:CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE峰值回流温度(摄氏度):225
电源:3/5,+-12/+-24 V认证状态:Not Qualified
座面最大高度:1 mm子类别:Peripheral Drivers
最大供电电压:24 V最小供电电压:12 V
表面贴装:YES温度等级:INDUSTRIAL
端子面层:MATTE TIN端子形式:NO LEAD
端子节距:0.5 mm端子位置:QUAD
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:5 mm
Base Number Matches:1

AD5750BCPZ-REEL 数据手册

 浏览型号AD5750BCPZ-REEL的Datasheet PDF文件第28页浏览型号AD5750BCPZ-REEL的Datasheet PDF文件第29页浏览型号AD5750BCPZ-REEL的Datasheet PDF文件第30页浏览型号AD5750BCPZ-REEL的Datasheet PDF文件第32页浏览型号AD5750BCPZ-REEL的Datasheet PDF文件第33页浏览型号AD5750BCPZ-REEL的Datasheet PDF文件第34页 
AD5750/AD5750-1  
APPLICATIONS INFORMATION  
TRANSIENT VOLTAGE PROTECTION  
LAYOUT GUIDELINES  
In any circuit where accuracy is important, careful consideration  
of the power supply and ground return layout helps to ensure the  
rated performance. The PCB on which the AD5750/AD5750-1  
are mounted should be designed so that the AD5750/AD5750-1  
lie on the analog plane.  
The AD5750/AD5750-1 contain ESD protection diodes that  
prevent damage from normal handling. The industrial control  
environment can, however, subject I/O circuits to much higher  
transients. To protect the AD5750/AD5750-1 from excessively  
high voltage transients, external power diodes and a surge  
current limiting resistor may be required, as shown in Figure 56.  
The constraint on the resistor value is that during normal opera-  
tion the output level at IOUT must remain within its voltage  
compliance limit of AVDD − 2.75 V and the two protection  
diodes and resistor must have appropriate power ratings.  
Further protection can be added with transient voltage  
suppressors if needed.  
The AD5750/AD5750-1 should have ample supply bypassing of  
10 μF in parallel with 0.1 μF on each supply located as close to  
the package as possible, ideally right up against the device. The  
10 μF capacitors are the tantalum bead type. The 0.1 μF capaci-  
tor should have low effective series resistance (ESR) and low  
effective series inductance (ESI) such as the common ceramic  
types, which provide a low impedance path to ground at high  
frequencies to handle transient currents due to internal logic  
switching.  
AVDD  
In systems where there are many devices on one board, it is often  
useful to provide some heat sinking capability to allow the power  
to dissipate easily.  
AVDD  
AD5750/AD5750-1  
R
P
IOUT  
R
LOAD  
AD5750/AD5750-1  
AVSS  
Figure 56. Output Transient Voltage Protection  
THERMAL CONSIDERATIONS  
It is important to understand the effects of power dissipation on  
the package and how it affects junction temperature. The internal  
junction temperature should not exceed 125°C. The AD5750/  
AD5750-1 are packaged in a 32-lead, 5 mm × 5 mm LFCSP  
package. The thermal impedance, θJA, is 28°C/W. It is important  
that the devices are not operated under conditions that cause  
the junction temperature to exceed its junction temperature.  
AVSS  
PLANE  
BOARD  
Figure 57. Paddle Connection to Board  
The AD5750/AD5750-1 have an exposed paddle beneath the  
device. Connect this paddle to the AVSS supply for the part. For  
optimum performance, special considerations should be used to  
design the motherboard and to mount the package. For enhanced  
thermal, electrical, and board level performance, the exposed  
paddle on the bottom of the package should be soldered to the  
corresponding thermal land paddle on the PCB. Thermal vias  
should be designed into the PCB land paddle area to further  
improve heat dissipation.  
Worst-case conditions occur when the AD5750/AD5750-1 are  
operated from the maximum AVDD (26.4 V) and driving the  
maximum current (24 mA) directly to ground. The quiescent  
current of the AD5750/AD5750-1 should also be taken into  
account, nominally ~4 mA.  
The following calculations estimate maximum power dissipa-  
tion under these worst-case conditions, and determine  
maximum ambient temperature based on this:  
Power Dissipation = 26.4 V × 28 mA = 0.7392 W  
Temp Increase = 28°C × 0.7392 W = 20.7°C  
The AVSS plane on the device can be increased (as shown in  
Figure 57) to provide a natural heat sinking effect.  
Maximum Ambient Temp = 125°C − 20.7°C = 104.3°C  
These figures assume proper layout and grounding techniques  
are followed to minimize power dissipation, as outlined in the  
Layout Guidelines section.  
Rev. A | Page 31 of 36  
 
 
 
 

AD5750BCPZ-REEL 替代型号

型号 品牌 替代类型 描述 数据表
AD5750BCPZ-REEL ADI

当前型号

Industrial Current/Voltage Output Driver with Programmable Ranges
AD5750ACPZ-REEL ADI

完全替代

Industrial Current/Voltage Output Driver with Programmable Ranges
AD5750BCPZ ADI

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Industrial Current/Voltage Output Driver, Programmable Ranges
AD5750ACPZ ADI

类似代替

Industrial Current/Voltage Output Driver, Programmable Ranges

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