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AD5721BRUZ-RL7 PDF预览

AD5721BRUZ-RL7

更新时间: 2022-02-26 12:31:37
品牌 Logo 应用领域
亚德诺 - ADI /
页数 文件大小 规格书
31页 1447K
描述
Multiple Range, 16-/12-Bit Bipolar/Unipolar, Voltage Output DACs

AD5721BRUZ-RL7 数据手册

 浏览型号AD5721BRUZ-RL7的Datasheet PDF文件第1页浏览型号AD5721BRUZ-RL7的Datasheet PDF文件第2页浏览型号AD5721BRUZ-RL7的Datasheet PDF文件第3页浏览型号AD5721BRUZ-RL7的Datasheet PDF文件第5页浏览型号AD5721BRUZ-RL7的Datasheet PDF文件第6页浏览型号AD5721BRUZ-RL7的Datasheet PDF文件第7页 
AD5761/AD5721  
Data Sheet  
Parameter2  
Min  
Typ  
Max  
Unit  
nF  
V
Test Conditions/Comments  
Capacitive Load Stability  
Headroom  
1
1
0.5  
RLOAD = 1 kΩ for all ranges except 0 V to16 V and 0 V  
to 20 V ranges (RLOAD = 2 kΩ)  
Output Voltage TC  
Short-Circuit Current  
Resistive Load  
3
25  
ppm FSR/°C  
mA  
kΩ  
kΩ  
mV/mA  
Ω
10 V range, external reference  
Short on the VOUT pin  
All ranges except 0 V to16 V and 0 V to 20 V  
0 V to16 V, 0 V to 20 V ranges  
Outputs unloaded  
1
2
Load Regulation  
DC Output Impedance  
LOGIC INPUTS5  
Input Voltage  
High, VIH  
0.3  
0.5  
Outputs unloaded  
DVCC = 1.7 V to 5.5 V, JEDEC compliant  
0.7 × DVCC  
V
V
Low, VIL  
0.3 × DVCC  
Input Current  
Leakage Current  
−1  
+1  
+1  
µA  
µA  
µA  
pF  
SDI, SCLK, SYNC  
−1  
LDAC, CLEAR, RESET pins held high  
LDAC, CLEAR, RESET pins held low  
Per pin, outputs unloaded  
−55  
Pin Capacitance  
LOGIC OUTPUTS (SDO, ALERT)5  
5
5
Output Voltage  
Low, VOL  
High, VOH  
High Impedance, SDO Pin  
Leakage Current  
Pin Capacitance  
0.4  
+1  
V
V
DVCC = 1.7 V to 5.5 V, sinking 200 µA  
DVCC = 1.7 V to 5.5 V, sourcing 200 µA  
DVCC − 0.5  
−1  
µA  
pF  
POWER REQUIREMENTS  
VDD  
VSS  
DVCC  
IDD  
ISS  
DICC  
4.75  
−16.5  
1.7  
30  
0
5.5  
6.5  
3
V
V
V
5.1  
1
0.005  
67.1  
0.1  
mA  
mA  
µA  
mW  
mV/V  
Outputs unloaded, external reference  
Outputs unloaded  
VIH = DVCC, VIL = DGND  
11 V operation, outputs unloaded  
VDD 10%, VSS = −15 V  
1
Power Dissipation  
DC Power Supply Rejection  
Ratio (PSRR)5  
0.1  
80  
mV/V  
dB  
VSS 10%, VDD = +15 V  
VDD 200 mV, 50 Hz/60 Hz, VSS = −15 V; external  
reference; CLOAD = unloaded  
AC PSRR5  
80  
dB  
VSS 200 mV, 50 Hz/60 Hz, VDD = +15 V; external  
reference; CLOAD = unloaded  
1 For specified performance, headroom requirement is 1 V.  
2 Temperature range: −40°C to +125°C, typical at +25°C.  
3 External reference means 2 V to 2.85 V with overrange and 2 V to 3 V without overrange.  
4 Integral nonlinearity error is specified at 4 LSB (minimum/maximum) for 0 V to 16 V and 0 V to 20 V ranges with VREFIN = 2.5 V external reference, and for all ranges  
with VREFIN = 2 V to 2.85 V with overrange and 2 V to 3 V without overrange.  
5 Guaranteed by design and characterization, not production tested.  
Rev. C | Page 4 of 31  

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