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AD5620CRM-1REEL7 PDF预览

AD5620CRM-1REEL7

更新时间: 2024-01-26 04:15:07
品牌 Logo 应用领域
亚德诺 - ADI 转换器数模转换器光电二极管
页数 文件大小 规格书
24页 554K
描述
Single, 12-/14-/16-Bit nanoDAC with 5 ppm/C On-Chip Reference in SOT-23

AD5620CRM-1REEL7 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Obsolete零件包装代码:TSSOP
包装说明:TSSOP, TSSOP8,.19针数:8
Reach Compliance Code:not_compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:8.11
Is Samacsys:N最大模拟输出电压:3.3 V
最小模拟输出电压:转换器类型:D/A CONVERTER
输入位码:BINARY输入格式:SERIAL
JESD-30 代码:S-PDSO-G8JESD-609代码:e0
长度:3 mm最大线性误差 (EL):0.0244%
湿度敏感等级:1位数:12
功能数量:1端子数量:8
最高工作温度:105 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装等效代码:TSSOP8,.19封装形状:SQUARE
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH峰值回流温度(摄氏度):240
电源:3/5 V认证状态:Not Qualified
座面最大高度:1.1 mm最大稳定时间:10 µs
标称安定时间 (tstl):8 µs子类别:Other Converters
最大压摆率:1 mA标称供电电压:3 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL处于峰值回流温度下的最长时间:30
宽度:3 mmBase Number Matches:1

AD5620CRM-1REEL7 数据手册

 浏览型号AD5620CRM-1REEL7的Datasheet PDF文件第4页浏览型号AD5620CRM-1REEL7的Datasheet PDF文件第5页浏览型号AD5620CRM-1REEL7的Datasheet PDF文件第6页浏览型号AD5620CRM-1REEL7的Datasheet PDF文件第8页浏览型号AD5620CRM-1REEL7的Datasheet PDF文件第9页浏览型号AD5620CRM-1REEL7的Datasheet PDF文件第10页 
AD5620/AD5640/AD5660  
TIMING CHARACTERISTICS  
All input signals are specified with tr = tf = 1 ns/V (10% to 90% of VDD) and timed from a voltage level of (VIL + VIH)/2. See Figure 2.  
DD = 2.7 V to 5.5 V; all specifications TMIN to TMAX, unless otherwise noted.  
V
Table 3.  
Limit at TMIN, TMAX  
VDD = 3.6 V to 5.5 V  
Parameter  
VDD = 2.7 V to 3.6 V  
Unit  
Conditions/Comments  
SCLK cycle time  
SCLK high time  
SCLK low time  
SYNC to SCLK falling edge set-up time  
Data set-up time  
1
t1  
50  
13  
13  
13  
5
33  
13  
13  
13  
5
ns min  
ns min  
ns min  
ns min  
ns min  
ns min  
ns min  
ns min  
ns min  
ns min  
t2  
t3  
t4  
t5  
t6  
t7  
t±  
t9  
t10  
4.5  
0
4.5  
0
Data hold time  
SCLK falling edge to SYNC rising edge  
Minimum SYNC high time  
SYNC rising edge to SCLK fall ignore  
SCLK falling edge to SYNC fall ignore  
50  
13  
0
33  
13  
0
1 Maximum SCLK frequency is 30 MHz at VDD = 3.6 V to 5.5 V and 20 MHz at VDD = 2.7 V to 3.6 V.  
t10  
t1  
t9  
SCLK  
t2  
t8  
t3  
t7  
t4  
SYNC  
DIN  
t6  
t5  
MSB  
LSB  
LSB = DB0  
MSB = DB23 FOR AD5660;  
MSB = DB15 FOR AD5620/AD5640  
Figure 2. Serial Write Operation  
Rev. A | Page 7 of 24  
 

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