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AD542JH PDF预览

AD542JH

更新时间: 2024-01-15 06:42:20
品牌 Logo 应用领域
亚德诺 - ADI 运算放大器放大器电路
页数 文件大小 规格书
12页 375K
描述
High Performance, BiFET Operational Amplifiers

AD542JH 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:TO-99包装说明:HERMETICALLY SEALED, METAL CAN, TO-99, 8 PIN
针数:8Reach Compliance Code:unknown
风险等级:5.89放大器类型:OPERATIONAL AMPLIFIER
最大平均偏置电流 (IIB):0.000025 µA标称共模抑制比:80 dB
最大输入失调电压:1000 µVJESD-30 代码:O-MBCY-W8
JESD-609代码:e0湿度敏感等级:NOT SPECIFIED
标称负供电电压 (Vsup):-15 V功能数量:1
端子数量:8最高工作温度:125 °C
最低工作温度:-55 °C封装主体材料:METAL
封装形状:ROUND封装形式:CYLINDRICAL
峰值回流温度(摄氏度):NOT SPECIFIED标称压摆率:3 V/us
子类别:Operational Amplifier供电电压上限:18 V
标称供电电压 (Vsup):15 V表面贴装:NO
技术:BIPOLAR温度等级:MILITARY
端子面层:TIN LEAD端子形式:WIRE
端子位置:BOTTOM处于峰值回流温度下的最长时间:NOT SPECIFIED
标称均一增益带宽:1000 kHzBase Number Matches:1

AD542JH 数据手册

 浏览型号AD542JH的Datasheet PDF文件第6页浏览型号AD542JH的Datasheet PDF文件第7页浏览型号AD542JH的Datasheet PDF文件第8页浏览型号AD542JH的Datasheet PDF文件第10页浏览型号AD542JH的Datasheet PDF文件第11页浏览型号AD542JH的Datasheet PDF文件第12页 
AD542/AD544/AD547  
The oscilloscope photo of Figure 31b shows the output of the  
circuit of Figure 31a. The upper trace represents the reference  
input, and the bottom trace shows the output voltage for a  
digital input of all ones on the DAC (Gain 1–2–n). The 47 pF  
capacitor across the feedback resistor compensates for the DAC  
output capacitance, and the 150 pF load capacitor serves to  
minimize output glitches.  
USING THE AD547 IN LOG AMPLIFIER APPLICATIONS  
Log amplifiers or log ratio amplifiers are useful in applications  
requiring compression of wide-range analog input data, linear-  
ization of transducers having exponential outputs, and analog  
computing, ranging from simple translation of natural relation-  
ships in log form (e.g., computing absorbance as the log-ratio of  
input currents), to the use of logarithms in facilitating analog  
computation of terms involving arbitrary exponents and  
multi-term products and ratios.  
The picoamp level input current and low offset voltage of the  
AD547 make it suitable for wide dynamic range log amplifiers.  
Figure 33 is a schematic of a log ratio circuit employing the  
AD547 that can achieve less than 1% conformance error over 5  
decades of current input, 1 nA to 100 µA. For voltage inputs,  
the dynamic range is typically 50 mV to 10 V for 1% error,  
limited on the low end by the amplifiers’ input offset voltage.  
Figure 31b. Voltage Output DAC Settling Characteristic  
Figure 32a illustrates the 10-bit digital-to-analog converter,  
AD7533, connected for bipolar operation. Since the digital  
input can accept bipolar numbers and VREF can accept a bipolar  
analog input, the circuit can perform a 4-quadrant multiplying  
function.  
Figure 33. Log-Ratio Amplifier  
The conversion between current (or voltage) input and log out-  
put is accomplished by the base emitter junctions of the dual  
transistor Q1. Assuming Q1 has β > 100, which is the case for  
the specified transistor, the base-emitter voltage on side 1 is to a  
close approximation:  
Figure 32a. AD544 Used as DAC Output Amplifiers  
The photos exhibit the response to a step input at VREF. Figure  
32b is the large signal response and Figure 32c is the small sig-  
nal response. C1 phase compensation (15 pF) is required for  
stability when using high speed amplifiers. C1 is used to cancel  
the pole formed by the DAC internal feedback resistance and  
the output capacitance of the DAC.  
V
BE A = kT/q ln I1/IS1  
This circuit is arranged to take the difference of the VBE’s of  
Q1A and Q1B, thus producing an output voltage proportional  
to the log of the ratio of the inputs:  
KkT  
q
VOUT = K (VBE A VBE B) = –  
(ln I1/IS1 – ln I2 /IS2)  
VOUT = −K kT /q ln I1/I2  
The scaling constant, K is set by R1 and RTC to about 16, to  
produce 1 V change in output voltage per decade difference in  
input signals. RTC is a special resistor with a +3500 ppm/°C  
temperature coefficient, which makes K inversely proportional  
to temperature, compensating for the “T” in kT/q. The log-  
ratio transfer characteristic is therefore independent of  
temperature.  
Figure 32b. Large Signal  
Response  
Figure 32c. Small Signal  
Response  
REV. B  
–9–  

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