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AD5381BST-5 PDF预览

AD5381BST-5

更新时间: 2024-01-30 19:12:36
品牌 Logo 应用领域
亚德诺 - ADI 转换器
页数 文件大小 规格书
40页 616K
描述
32-Channel, 3 V/5 V, Single-Supply, 14-Bit, Voltage Output DAC

AD5381BST-5 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:QFP包装说明:14 X 14 MM, MS-026-BED, LQFP-100
针数:100Reach Compliance Code:not_compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.42最大模拟输出电压:5.5 V
最小模拟输出电压:转换器类型:D/A CONVERTER
输入位码:BINARY输入格式:PARALLEL, WORD
JESD-30 代码:S-PQFP-G100JESD-609代码:e0
长度:14 mm最大线性误差 (EL):0.0244%
湿度敏感等级:3位数:12
功能数量:1端子数量:100
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:LFQFP
封装等效代码:QFP100,.63SQ,20封装形状:SQUARE
封装形式:FLATPACK, LOW PROFILE, FINE PITCH峰值回流温度(摄氏度):240
电源:3/5,5 V认证状态:Not Qualified
座面最大高度:1.6 mm最大稳定时间:8 µs
标称安定时间 (tstl):6 µs子类别:Other Converters
标称供电电压:5 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Tin/Lead (Sn85Pb15)端子形式:GULL WING
端子节距:0.5 mm端子位置:QUAD
处于峰值回流温度下的最长时间:30宽度:14 mm

AD5381BST-5 数据手册

 浏览型号AD5381BST-5的Datasheet PDF文件第1页浏览型号AD5381BST-5的Datasheet PDF文件第2页浏览型号AD5381BST-5的Datasheet PDF文件第4页浏览型号AD5381BST-5的Datasheet PDF文件第5页浏览型号AD5381BST-5的Datasheet PDF文件第6页浏览型号AD5381BST-5的Datasheet PDF文件第7页 
AD5382  
GENERAL DESCRIPTION  
speeds in excess of 30 MHz and an I2C compatible interface  
that supports a 400 kHz data transfer rate.  
The AD5382 is a complete, single-supply, 32-channel, 14-bit  
DAC available in a 100-lead LQFP package. All 32 channels  
have an on-chip output amplifier with rail-to-rail operation.  
The AD5382 includes an internal software-selectable 1.25 V/  
2.5 V, 10 ppm/°C reference, an on-chip channel monitor  
function that multiplexes the analog outputs to a common  
MON_OUT pin for external monitoring, and an output  
amplifier boost mode that allows optimization of the amplifier  
slew rate. The AD5382 contains a double-buffered parallel  
An input register followed by a DAC register provides double  
buffering, allowing the DAC outputs to be updated indepen-  
dently or simultaneously using the  
input.  
LDAC  
Each channel has a programmable gain and offset adjust  
register that allows the user to fully calibrate any DAC channel.  
Power consumption is typically 0.25 mA/channel when  
operating with boost mode disabled.  
interface that features a 20 ns  
pulse width, an SPI/QSPI/  
WR  
MICROWIRE/DSP compatible serial interface with interface  
Table 1. Other High Channel Count, Low Voltage, Single Supply DACs in Product Portfolio  
Model  
Resolution AVDD Range  
Output Channels  
4.5 V to 5.5 V 40  
2.7 V to 3.6 V 40  
Linearity Error (LSB)  
Package Description  
100-Lead LQFP  
100-Lead LQFP  
100-Lead CSPBGA  
100-Lead CSPBGA  
100-Lead LQFP  
100-Lead LQFP  
100-Lead LQFP  
100-Lead LQFP  
52-Lead LQFP  
64-Lead LFCSP  
52-Lead LQFP  
64-Lead LFCSP  
52-Lead LQFP  
64-Lead LFCSP  
52-Lead LQFP  
64-Lead LFCSP  
52-Lead LQFP  
Package Option  
ST-100  
ST-100  
BC-100  
BC-100  
ST-100  
ST-100  
ST-100  
ST-100  
ST-52  
CP-64  
ST-52  
CP-64  
ST-52  
CP-64  
ST-52  
CP-64  
ST-52  
AD5380BST-5  
AD5380BST-3  
AD5384BBC-5 14 Bits  
AD5384BBC-3 14 Bits  
14 Bits  
14 Bits  
4
4
4
4
1
1
1
1
3
3
3
3
1
1
1
1
3
3
3
3
4.5 V to 5.5 V 40  
2.7 V to 3.6 V 40  
4.5 V to 5.5 V 40  
2.7 V to 3.6 V 40  
4.5 V to 5.5 V 32  
2.7 V to 3.6 V 32  
4.5 V to 5.5 V 16  
4.5 V to 5.5 V 16  
2.7 V to 3.6 V 16  
2.7 V to 3.6 V 16  
4.5 V to 5.5 V 16  
4.5 V to 5.5 V 16  
2.7 V to 3.6 V 16  
2.7 V to 3.6 V 16  
AD5381BST-5  
AD5381BST-3  
AD5383BST-5  
AD5383BST-3  
AD5390BST-5  
AD5390BCP-5 14 Bits  
AD5390BST-3 14 Bits  
AD5390BCP-3 14 Bits  
AD5391BST-5 12 Bits  
AD5391BCP-5 12 Bits  
AD5391BST-3 12 Bits  
AD5391BCP-3 12 Bits  
AD5392BST-5 14 Bits  
AD5392BCP-5 14 Bits  
AD5392BST-3 14 Bits  
AD5392BCP-3 14 Bits  
12 Bits  
12 Bits  
12 Bits  
12 Bits  
14 Bits  
4.5 V to 5.5 V  
4.5 V to 5.5 V  
2.7 V to 3.6 V  
2.7 V to 3.6 V  
8
8
8
8
64-Lead LFCSP  
52-Lead LQFP  
64-Lead LFCSP  
CP-64  
ST-52  
CP-64  
Table 2. 40-Channel Bipolar Voltage Output DAC  
Model  
Resolution Analog Supplies  
Output Channels Linearity Error (LSB) Package  
Package Option  
AD5379ABC  
14 Bits 11.4 V to 16.5 V  
40  
3
108-Lead CSPBGA  
BC-108  
Rev. 0 | Page 3 of 40  

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