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AD5339ARM PDF预览

AD5339ARM

更新时间: 2024-02-19 02:49:39
品牌 Logo 应用领域
亚德诺 - ADI /
页数 文件大小 规格书
24页 928K
描述
2.5 V to 5.5 V, 250 UA, 2-Wire Interface Dual-Voltage Output, 8-/10-/12-Bit DACs

AD5339ARM 技术参数

是否无铅:不含铅是否Rohs认证:符合
生命周期:Obsolete零件包装代码:TSSOP
包装说明:ROHS COMPLIANT, MO-187AA, MSOP-8针数:8
Reach Compliance Code:unknownECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.35
Is Samacsys:N最大模拟输出电压:5.499 V
最小模拟输出电压:0.001 V转换器类型:D/A CONVERTER
输入位码:BINARY输入格式:SERIAL
JESD-30 代码:S-PDSO-G8JESD-609代码:e3
长度:3 mm最大线性误差 (EL):0.1953%
湿度敏感等级:1位数:12
功能数量:1端子数量:8
最高工作温度:105 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装等效代码:TSSOP8,.19封装形状:SQUARE
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH峰值回流温度(摄氏度):260
电源:3/5 V认证状态:Not Qualified
座面最大高度:1.1 mm最大稳定时间:10 µs
标称安定时间 (tstl):8 µs子类别:Other Converters
最大压摆率:0.375 mA标称供电电压:3 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Matte Tin (Sn)
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:3 mmBase Number Matches:1

AD5339ARM 数据手册

 浏览型号AD5339ARM的Datasheet PDF文件第6页浏览型号AD5339ARM的Datasheet PDF文件第7页浏览型号AD5339ARM的Datasheet PDF文件第8页浏览型号AD5339ARM的Datasheet PDF文件第10页浏览型号AD5339ARM的Datasheet PDF文件第11页浏览型号AD5339ARM的Datasheet PDF文件第12页 
AD5337/AD5338/AD5339  
TERMINOLOGY  
Relative Accuracy (Integral Nonlinearity, INL)  
For the DAC, relative accuracy, or integral nonlinearity (INL),  
is a measure, in LSBs, of the maximum deviation from a straight  
line passing through the endpoints of the DAC transfer function.  
Typical INL vs. code plots can be seen in Figure 6, Figure 7, and  
Figure 8.  
Major-Code Transition Glitch Energy  
The energy of the impulse injected into the analog output when  
the code in the DAC register changes state. Normally specified  
as the area of the glitch in nV-s and is measured when the  
digital code is changed by 1 LSB at the major carry transition  
(011 . . . 11 to 100 . . . 00 or 100 . . . 00 to 011 . . . 11).  
Differential Nonlinearity (DNL)  
Digital Feedthrough  
The difference between the measured change and the ideal 1 LSB  
change between any two adjacent codes. A specified differential  
nonlinearity of 1 LSB maximum ensures monotonicity. This  
DAC is guaranteed monotonic by design. Typical DNL vs. code  
plots can be seen in Figure 9, Figure 10, and Figure 11.  
A measure of the impulse injected into the analog output of the  
DAC from the digital input pins of the device when the DAC  
output is not being updated. Specified in nV-s and measured  
with a worst-case change on the digital input pins, such as  
changing from all 0s to all 1s or vice-versa.  
Offset Error  
Digital Crosstalk  
A measure of the offset error of the DAC and the output  
amplifier, expressed as a percentage of the full-scale range.  
The glitch impulse transferred to the output of one DAC at mid-  
scale in response to a full-scale code change (all 0s to all 1s, or  
vice versa) in the input register of another DAC. It is expressed  
in nV-s.  
Gain Error  
A measure of the span error of the DAC. It is the deviation in  
slope of the actual DAC transfer characteristic from the ideal,  
expressed as a percentage of the full-scale range.  
DAC-to-DAC Crosstalk  
The glitch impulse transferred to the output of one DAC due to  
a digital code change and subsequent output change of another  
DAC. This includes both digital and analog crosstalk. It is  
measured by loading one of the DACs with a full-scale code  
Offset Error Drift  
A measure of the change in offset error with changes in  
temperature. It is expressed in (ppm of full-scale range)/°C.  
change (all 0s to all 1s, or vice versa) with the  
bit set low  
LDAC  
and monitoring the output of another DAC. The energy of the  
glitch is expressed in nV-s.  
Gain Error Drift  
A measure of the change in gain error with changes in  
temperature. It is expressed in (ppm of full-scale range)/°C.  
Multiplying Bandwidth  
The amplifiers within the DAC have a finite bandwidth. The  
multiplying bandwidth is the frequency at which the output  
amplitude falls to 3 dB below the input. A sine wave on the  
reference (with full-scale code loaded to the DAC) appears on  
the output.  
Power Supply Rejection Ratio (PSRR)  
This indicates how the output of the DAC is affected by changes  
in the supply voltage. PSRR is the ratio of the change in VOUT to  
a change in VDD for full-scale output of the DAC. It is measured  
in dB. VREF is held at 2 V and VDD is varied 10%.  
Total Harmonic Distortion (THD)  
DC Crosstalk  
The difference between an ideal sine wave and its attenuated  
version using the DAC. The sine wave is used as the reference  
for the DAC, and the THD is a measure of the harmonic  
distortion present in the DAC output. It is measured in dB.  
The dc change in the output level of one DAC at midscale in  
response to a full-scale code change (all 0s to all 1s and vice  
versa) and output change of another DAC. It is expressed in µV.  
Reference Feedthrough  
The ratio of the amplitude of the signal at the DAC output to  
the reference input when the DAC output is not being updated.  
It is expressed in dB.  
Rev. A | Page 9 of 24  
 

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