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AD5336BRUZ PDF预览

AD5336BRUZ

更新时间: 2024-09-23 12:55:03
品牌 Logo 应用领域
亚德诺 - ADI 转换器数模转换器光电二极管
页数 文件大小 规格书
20页 384K
描述
2.5 V to 5.5 V, 500 A, Parallel Interface Quad Voltage-Output 8-/10-/12-Bit DACs

AD5336BRUZ 数据手册

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AD5334/AD5335/AD5336/AD5344–SPECIFICATIONS  
(VDD = 2.5 V to 5.5 V, VREF = 2 V. RL = 2 kto GND; CL =200 pF to GND; all specifications TMIN to TMAX unless otherwise noted.)  
B Version2  
Typ  
Parameter1  
Min  
Max  
Unit  
Conditions/Comments  
DC PERFORMANCE3, 4  
AD5334  
Resolution  
8
Bits  
LSB  
LSB  
Relative Accuracy  
Differential Nonlinearity  
AD5335/AD5336  
Resolution  
Relative Accuracy  
Differential Nonlinearity  
AD5344  
0.15  
0.02  
1
0.25  
Guaranteed Monotonic By Design Over All Codes  
Guaranteed Monotonic By Design Over All Codes  
Guaranteed Monotonic By Design Over All Codes  
10  
Bits  
LSB  
LSB  
0.5  
0.05  
4
0.5  
Resolution  
12  
2
0.2  
0.4  
0.1  
Bits  
LSB  
LSB  
% of FSR  
Relative Accuracy  
Differential Nonlinearity  
Offset Error  
16  
1
3
Gain Error  
1
% of FSR  
Lower Deadband5  
Upper Deadband  
Offset Error Drift6  
Gain Error Drift6  
DC Power Supply Rejection Ratio6  
DC Crosstalk6  
10  
10  
–12  
–5  
–60  
200  
60  
60  
mV  
mV  
Lower Deadband Exists Only if Offset Error Is Negative  
VDD = 5 V. Upper Deadband Exists Only if VREF = VDD  
ppm of FSR/°C  
ppm of FSR/°C  
dB  
µV  
VDD = 10%  
RL = 2 kto GND, 2 kto VDD; CL = 200 pF to GND;  
Gain = 0  
DAC REFERENCE INPUT6  
VREF Input Range  
0.25  
VDD  
V
VREF Input Impedance  
180  
90  
90  
45  
–90  
–90  
kΩ  
kΩ  
kΩ  
kΩ  
dB  
dB  
Gain = 1. Input Impedance = RDAC (AD5336/AD5344)  
Gain = 2. Input Impedance = RDAC (AD5336)  
Gain = 1. Input Impedance = RDAC (AD5334/AD5335)  
Gain = 2. Input Impedance = RDAC (AD5334)  
Frequency = 10 kHz  
Reference Feedthrough  
Channel-to-Channel Isolation  
Frequency = 10 kHz  
OUTPUT CHARACTERISTICS6  
Minimum Output Voltage4, 7  
Maximum Output Voltage4, 7  
DC Output Impedance  
0.001  
VDD – 0.001  
V min  
V max  
Rail-to-Rail Operation  
0.5  
50  
20  
2.5  
5
Short Circuit Current  
mA  
mA  
µs  
VDD = 5 V  
VDD = 3 V  
Power-Up Time  
Coming Out of Power-Down Mode. VDD = 5 V  
Coming Out of Power-Down Mode. VDD = 3 V  
µs  
LOGIC INPUTS6  
Input Current  
VIL, Input Low Voltage  
1
µA  
V
0.8  
VDD = 5 V 10%  
VDD = 3 V 10%  
VDD = 2.5 V  
0.6  
0.5  
V
V
VIH, Input High Voltage  
Pin Capacitance  
2.4  
2.1  
2.0  
V
V
V
pF  
VDD = 5 V 10%  
VDD = 3 V 10%  
VDD = 2.5 V  
3.5  
POWER REQUIREMENTS  
VDD  
2.5  
5.5  
V
IDD (Normal Mode)  
VDD = 4.5 V to 5.5 V  
All DACs active and excluding load currents.  
VIH = VDD, VIL = GND.  
IDD increases by 50 µA at VREF > VDD – 100 mV.  
600  
500  
900  
700  
µA  
µA  
V
DD = 2.5 V to 3.6 V  
IDD (Power-Down Mode)  
VDD = 4.5 V to 5.5 V  
VDD = 2.5 V to 3.6 V  
0.2  
0.08  
1
1
µA  
µA  
NOTES  
1See Terminology section.  
2Temperature range: B Version: –40°C to +105°C; typical specifications are at 25°C.  
3Linearity is tested using a reduced code range: AD5334 (Code 8 to 255); AD5335/AD5336 (Code 28 to 1023); AD5344 (Code 115 to 4095).  
4DC specifications tested with outputs unloaded.  
5This corresponds to x codes. x = Deadband voltage/LSB size.  
6Guaranteed by design and characterization, not production tested.  
7In order for the amplifier output to reach its minimum voltage, Offset Error must be negative. In order for the amplifier output to reach its maximum voltage, VREF = VDD and  
“Offset plus Gain” Error must be positive.  
Specifications subject to change without notice.  
–2–  
REV. 0  

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