AD5322

更新时间： 2024-01-09 14:34:14

品牌	Logo	应用领域
亚德诺 - ADI		/
页数	文件大小	规格书
16页	211K
描述
+2.5 V to +5.5 V, 230 uA Dual Rail-to-Rail, Voltage Output 8-/10-/12-Bit DACs

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技术参数
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AD5322 技术参数

是否无铅：	含铅	是否Rohs认证：	符合
生命周期：	Active	零件包装代码：	TSSOP
包装说明：	TSSOP, TSSOP10,.19,20	针数：	10
Reach Compliance Code：	compliant	ECCN代码：	EAR99
HTS代码：	8542.39.00.01	风险等级：	5.25
最大模拟输出电压：	5.499 V	最小模拟输出电压：	0.001 V
转换器类型：	D/A CONVERTER	输入位码：	BINARY
输入格式：	SERIAL	JESD-30 代码：	S-PDSO-G10
JESD-609代码：	e3	长度：	3 mm
最大线性误差 (EL)：	0.1953%	湿度敏感等级：	1
位数：	12	功能数量：	1
端子数量：	10	最高工作温度：	105 °C
最低工作温度：	-40 °C	封装主体材料：	PLASTIC/EPOXY
封装代码：	TSSOP	封装等效代码：	TSSOP10,.19,20
封装形状：	SQUARE	封装形式：	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度（摄氏度）：	260	电源：	2.5/5.5 V
认证状态：	Not Qualified	座面最大高度：	1.1 mm
最大稳定时间：	10 µs	标称安定时间 (tstl)：	8 µs
子类别：	Other Converters	最大压摆率：	0.45 mA
标称供电电压：	3 V	表面贴装：	YES
技术：	CMOS	温度等级：	INDUSTRIAL
端子面层：	Matte Tin (Sn)	端子形式：	GULL WING
端子节距：	0.5 mm	端子位置：	DUAL
处于峰值回流温度下的最长时间：	30	宽度：	3 mm
Base Number Matches：	1

AD5322 数据手册

AD5302/AD5312/AD5322

DAC-TO-DAC CROSSTALK

CHANNEL-TO-CHANNEL ISOLATION

This is the glitch impulse transferred to the output of one DAC

due to a digital code change and subsequent output change of

the other DAC. This includes both digital and analog crosstalk.

It is measured by loading one of the DACs with a full-scale code

change (all 0s to all 1s and vice versa) while keeping LDAC low

and monitoring the output of the other DAC. The area of the

glitch is expressed in nV-secs.

This is a ratio of the amplitude of the signal at the output of one

DAC to a sine wave on the reference input of the other DAC. It

is measured in dBs.

GAIN ERROR

PLUS

OFFSET ERROR

IDEAL

DC CROSSTALK

OUTPUT

VOLTAGE

This is the dc change in the output level of one DAC in re-

sponse to a change in the output of the other DAC. It is mea-

sured with a full-scale output change on one DAC while

monitoring the other DAC. It is expressed in µV.

ACTUAL

POWER-SUPPLY REJECTION RATIO (PSRR)

POSITIVE

DAC CODE

OFFSET

ERROR

This indicates how the output of the DAC is affected by

changes in the supply voltage. PSRR is the ratio of the change in

V_OUTto a change in V_DDfor full-scale output of the DAC. It is

measured in dBs. V_REFis held at +2 V and V_DDis varied ±10%.

REFERENCE FEEDTHROUGH

This is the ratio of the amplitude of the signal at the DAC out-

put to the reference input when the DAC output is not being

updated (i.e., LDAC is high). It is expressed in dBs.

DEADBAND

AMPLIFIER

FOOTROOM

(1mV)

TOTAL HARMONIC DISTORTION

This is the difference between an ideal sine wave and its attenu-

ated version using the DAC. The sine wave is used as the refer-

ence for the DAC and the THD is a measure of the harmonics

present on the DAC output. It is measured in dBs.

NEGATIVE

OFFSET

ERROR

MULTIPLYING BANDWIDTH

The amplifiers within the DAC have a finite bandwidth. The

multiplying bandwidth is a measure of this. A sine wave on the

reference (with full-scale code loaded to the DAC) appears on

the output. The multiplying bandwidth is the frequency at

which the output amplitude falls to 3 dB below the input.

Figure 2. Transfer Function with Negative Offset

GAIN ERROR

PLUS

OFFSET ERROR

ACTUAL

OUTPUT

VOLTAGE

IDEAL

POSITIVE

OFFSET

ERROR

DAC CODE

Figure 3. Transfer Function with Positive Offset

–6–

REV. 0

1...3 4 567 8 9...16

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与AD5322相关器件

型号	品牌	描述	获取价格	数据表
AD5322ARM	ADI	2.5 V to 5.5 V, 230 Î¼A, Dual Rail-to-Rail, V	获取价格
AD5322ARM	ROCHESTER	SERIAL INPUT LOADING, 8 us SETTLING TIME, 12-BIT DAC, PDSO10, MO-187BA, MSOP-10	获取价格
AD5322ARM-REEL7	ADI	2.5 V to 5.5 V, 230 Î¼A, Dual Rail-to-Rail, V	获取价格
AD5322ARM-REEL7	ROCHESTER	SERIAL INPUT LOADING, 8 us SETTLING TIME, 12-BIT DAC, PDSO10, MO-187BA, MSOP-10	获取价格
AD5322ARMZ	ADI	2.5 V to 5.5 V, 230 Î¼A, Dual Rail-to-Rail, V	获取价格
AD5322ARMZ-REEL7	ADI	2.5 V to 5.5 V, 230 Î¼A, Dual Rail-to-Rail, V	获取价格

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