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AD5320BRMZ1 PDF预览

AD5320BRMZ1

更新时间: 2022-04-12 00:26:18
品牌 Logo 应用领域
亚德诺 - ADI /
页数 文件大小 规格书
20页 410K
描述
2.7 V to 5.5 V, 140 μA, Rail-to-Rail Output 12-Bit DAC in an SOT-23

AD5320BRMZ1 数据手册

 浏览型号AD5320BRMZ1的Datasheet PDF文件第7页浏览型号AD5320BRMZ1的Datasheet PDF文件第8页浏览型号AD5320BRMZ1的Datasheet PDF文件第9页浏览型号AD5320BRMZ1的Datasheet PDF文件第11页浏览型号AD5320BRMZ1的Datasheet PDF文件第12页浏览型号AD5320BRMZ1的Datasheet PDF文件第13页 
AD5320  
800  
2kLOAD TO V  
DD  
T
= 25°C  
A
600  
400  
200  
V
DD  
CH1  
CH2  
V
= 5V  
DD  
4
V
OUT  
V
= 3V  
DD  
0
0
1
2
3
(V)  
5
CH1 1V, CH 2 1V, TIME BASE = 20µs/DIV  
V
LOGIC  
Figure 20. Power-On Reset to 0 V  
Figure 17. Supply Current vs. Logic Input Voltage  
V
= 5V  
DD  
CH2  
CLK  
CLK  
CH2  
V
OUT  
V
OUT  
V
= 5V  
DD  
CH1  
FULL-SCALE CODE CHANGE  
000 HEX – FFF HEX  
T
= 25°C  
A
OUTPUT LOADED WITH  
2kAND 200pF TO GND  
CH1  
CH1 1V, CH2 5V, TIME BASE = 5µs/DIV  
CH1 1V, CH2 5V, TIME BASE = 1µs/DIV  
Figure 18. Full-Scale Settling Time  
Figure 21. Exiting Power-Down (800 Hex Loaded)  
2.56  
LOADED WITH 2k  
AND 200pF TO GND  
CH1  
CLK  
2.54  
2.52  
2.50  
CODE CHANGE:  
800 HEX TO 7FF HEX  
V
OUT  
CH2  
V
= 5V  
DD  
HALF-SCALE CODE CHANGE  
400 HEX – C00 HEX  
2.48  
2.46  
T
= 25°C  
A
OUTPUT LOADED WITH  
2kAND 200pF TO GND  
CH1 1V, CH2 5V, TIME BASE = 1µs/DIV  
500ns/DIV  
Figure 19. Half-Scale Settling Time  
Figure 22. Digital-to-Analog Glitch Impulse  
Rev. C | Page 10 of 20  
 
 
 

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