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AD5317RBRUZ PDF预览

AD5317RBRUZ

更新时间: 2024-02-16 18:06:28
品牌 Logo 应用领域
亚德诺 - ADI /
页数 文件大小 规格书
20页 410K
描述
Quad, 10-Bit nanoDAC® with 2 ppm/°C Reference, SPI Interface

AD5317RBRUZ 技术参数

Source Url Status Check Date:2013-05-01 14:56:11.994是否无铅: 含铅
是否Rohs认证: 符合生命周期:Active
包装说明:SON, TSSOP16,.25针数:16
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:2.29
最大模拟输出电压:5.005 V最小模拟输出电压:
转换器类型:D/A CONVERTER输入位码:BINARY
输入格式:SERIALJESD-30 代码:S-PDSO-N16
JESD-609代码:e3长度:5 mm
最大线性误差 (EL):0.049%湿度敏感等级:1
位数:10功能数量:1
端子数量:16最高工作温度:105 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:SON封装等效代码:TSSOP16,.25
封装形状:SQUARE封装形式:SMALL OUTLINE
峰值回流温度(摄氏度):260电源:3/5 V
认证状态:Not Qualified座面最大高度:1.2 mm
最大稳定时间:7 µs标称安定时间 (tstl):5 µs
子类别:Other Converters最大压摆率:1.3 mA
标称供电电压:5 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Matte Tin (Sn)端子形式:NO LEAD
端子节距:0.65 mm端子位置:DUAL
处于峰值回流温度下的最长时间:30宽度:4.4 mm
Base Number Matches:1

AD5317RBRUZ 数据手册

 浏览型号AD5317RBRUZ的Datasheet PDF文件第13页浏览型号AD5317RBRUZ的Datasheet PDF文件第14页浏览型号AD5317RBRUZ的Datasheet PDF文件第15页浏览型号AD5317RBRUZ的Datasheet PDF文件第17页浏览型号AD5317RBRUZ的Datasheet PDF文件第18页浏览型号AD5317RBRUZ的Datasheet PDF文件第19页 
AD5305/AD5315/AD5325  
If an output range of 0 V to VDD is required, the simplest solution  
is to connect the reference input to VDD. As this supply may not be  
very accurate and may be noisy, the AD5305/AD5315/AD5325  
may be powered from the reference voltage; for example, using  
a 5 V reference such as the REF195. The REF195 will output  
a steady supply voltage for the AD5305/AD5315/AD5325. The  
typical current required from the REF195 is 600 µA supply cur-  
rent and approximately 112 µA into the reference input. This is  
with no load on the DAC outputs. When the DAC outputs are  
loaded, the REF195 also needs to supply the current to the loads.  
The total current required (with a 10 kload on each output) is  
Multiple Devices on One Bus  
Figure 13 shows two AD5305 devices on the same serial bus.  
Each has a different slave address since the state of the A0 pin is  
different. This allows each of eight DACs to be written to or  
read from independently.  
V
A0  
DD  
AD5305  
SCL  
PULL-UP  
RESISTORS  
SDA  
MICRO-  
CONTROLLER  
712 µA + 4 5V / 10 kΩ = 2.70 mA  
(
)
SCL  
SDA  
A0  
The load regulation of the REF195 is typically 2 ppm/mA, which  
results in an error of 5.4 ppm (27 µV) for the 2.7 mA current  
drawn from it. This corresponds to a 0.0014 LSB error at eight  
bits and 0.022 LSB error at 12 bits.  
AD5305  
Figure 13. Multiple AD5305 Devices on One Bus  
Bipolar Operation Using the AD5305/AD5315/AD5325  
AD5305/AD5315/AD5325 as a Digitally Programmable Window  
Detector  
The AD5305/AD5315/AD5325 have been designed for single-  
supply operation, but a bipolar output range is also possible using  
the circuit in Figure 12. This circuit will give an output voltage  
range of 5 V. Rail-to-rail operation at the amplifier output is  
achievable using an AD820 or an OP295 as the output amplifier.  
A digitally programmable upper/lower limit detector using two  
of the DACs in the AD5305/AD5315/AD5325 is shown in  
Figure 14. The upper and lower limits for the test are loaded to  
DACs A and B, which, in turn, set the limits on the CMP04. If  
the signal at the VIN input is not within the programmed window,  
an LED will indicate the fail condition. Similarly, DACs C and  
D can be used for window detection on a second VIN signal.  
R2 = 10k⍀  
+5V  
6V TO 12V  
R1 = 10k⍀  
5V  
AD820/  
OP295  
10F  
0.1F  
؎5V  
+5V  
1k  
0.1F  
10F  
1k⍀  
V
IN  
V
V
A
DD  
OUT  
AD5305  
V
AD1585  
–5V  
PASS  
FAIL  
V
IN  
V
B
C
V
DD  
OUT  
OUT  
REFIN  
V
REF  
REFIN  
GND  
1F  
V
V
A
B
OUT  
OUT  
1/2  
AD5305/  
AD5315/  
V
D
OUT  
1/2  
CMP04  
A0  
PASS/FAIL  
*
AD5325  
GND SCL SDA  
DIN  
SDA  
SCL  
SCL  
V
OUT  
1/6 74HC05  
GND  
2-WIRE  
SERIAL  
INTERFACE  
*
ADDITIONAL PINS OMITTED FOR CLARITY  
Figure 12. Bipolar Operation with the AD5305  
Figure 14. Window Detection  
The output voltage for any input code can be calculated as  
follows:  
Coarse and Fine Adjustment Using the AD5305/AD5315/  
AD5325  
N
Two of the DACs in the AD5305/AD5315/AD5325 can be  
paired together to form a coarse and fine adjustment function,  
as shown in Figure 15. DAC A is used to provide the coarse  
adjustment while DAC B provides the fine adjustment. Varying  
the ratio of R1 and R2 will change the relative effect of the  
coarse and fine adjustments. With the resistor values and exter-  
nal reference shown, the output amplifier has unity gain for the  
DAC A output, so the output range is 0 V to 2.5 V – 1 LSB. For  
DAC B, the amplifier has a gain of 7.6 × 10–3, giving DAC B  
a range equal to 19 mV. Similarly, DACs C and D can be paired  
together for coarse and fine adjustment.  
REFIN × D / 2  
×
(
)
VOUT  
=
REFIN × R2 / R1  
(
)
  
R1 + R2 / R1  
(
)
where  
D is the decimal equivalent of the code loaded to the DAC.  
N is the DAC resolution.  
REFIN is the reference voltage input.  
with  
REFIN= 5 V, R1 = R2 = 10 k:  
VOUT = 10 × D / 2N – 5 V  
The circuit is shown with a 2.5 V reference, but reference volt-  
ages up to VDD may be used. The op amps indicated will allow  
a rail-to-rail output swing.  
(
)
–16–  
REV. F  

AD5317RBRUZ 替代型号

型号 品牌 替代类型 描述 数据表
AD5317RBRUZ ADI

当前型号

Quad, 10-Bit nanoDAC® with 2 ppm/°C Reference, SPI Interface
DAC6573IPW TI

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QUAD, 10-Bit, LOW-POWER, VOLTAGE OUTPUT, I2C INTERFACE DIGITAL TO ANALOG CONVERTER

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