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AD5301BRMZ-REEL71 PDF预览

AD5301BRMZ-REEL71

更新时间: 2022-04-12 13:54:50
品牌 Logo 应用领域
亚德诺 - ADI /
页数 文件大小 规格书
24页 429K
描述
2.5 V to 5.5 V, 120 μA, 2-Wire Interface, Voltage-Output 8-/10-/12-Bit DACs

AD5301BRMZ-REEL71 数据手册

 浏览型号AD5301BRMZ-REEL71的Datasheet PDF文件第15页浏览型号AD5301BRMZ-REEL71的Datasheet PDF文件第16页浏览型号AD5301BRMZ-REEL71的Datasheet PDF文件第17页浏览型号AD5301BRMZ-REEL71的Datasheet PDF文件第19页浏览型号AD5301BRMZ-REEL71的Datasheet PDF文件第20页浏览型号AD5301BRMZ-REEL71的Datasheet PDF文件第21页 
AD5301/AD5311/AD5321  
APPLICATIONS NOTES  
R2  
10k  
USING REF19x AS A POWER SUPPLY  
Because the supply current required by the AD5301/AD5311/  
AD5321 is extremely low, the user has an alternative option to  
employ a REF195 voltage reference (for 5 V) or a REF193 voltage  
reference (for 3 V) to supply the required voltage to the part  
(see Figure 36).  
+5V  
R1  
10kΩ  
±5V  
+5V  
AD820/  
OP295  
AD5301/  
AD5311/  
AD5321  
–5V  
V
V
OUT  
DD  
5V  
REF195  
10µF  
0.1µF  
150µA TYP  
V
DD  
V
= 0V TO 5V  
OUT  
2-WIRE  
SERIAL  
INTERFACE  
SDA  
SCL  
AD5301/  
AD5311/  
AD5321  
2-WIRE SERIAL  
INTERFACE  
Figure 37. Bipolar Operation with the AD5301/AD5311/AD5321  
The output voltage for any input code can be calculated as  
Figure 36. REF195 as Power Supply to AD5301/AD5311/AD5321  
V
OUT = [(VDD × (D/2N) × R1 + R2)/R1) − VDD × (R2/R1)]  
This is especially useful if the power supply is quite noisy or if  
the system supply voltages are at some value other than 5 V or  
3 V (for example, 15 V). The REF193/REF195 output a steady  
supply voltage for the AD5301/AD5311/AD5321. If the low  
dropout REF195 is used, it needs to supply a current of 150 μA  
to the AD5301/AD5311/AD5321. This is with no load on the  
output of the DAC. When the DAC output is loaded, the REF195  
also needs to supply the current to the load.  
where:  
D is the decimal equivalent of the code loaded to the DAC.  
N is the DAC resolution.  
With VDD = 5 V, R1 = R2 = 10 kΩ,  
V
OUT = (10 × D/2N) − 5 V  
MULTIPLE DEVICES ON ONE BUS  
Figure 38 shows four AD5301 devices on the same serial bus.  
Each has a different slave address since the state of their A0  
and A1 pins is different. This allows each DAC to be written to  
or read from independently. The master device output bus line  
drivers are open-drain, pull-downs in a fully I2C-compatible  
interface.  
The total current required (with a 2 kΩ load on the DAC output  
and full scale loaded to the DAC) is  
150 μA + (5 V/2 kΩ) = 2.65 mA  
The load regulation of the REF195 is typically 2 ppm/mA,  
which results in an error of 5.3 ppm (26.5 μV) for the 2.65 mA  
current drawn from it. This corresponds to a 0.00136 LSB error.  
CMOS DRIVEN SCL AND SDA LINES  
BIPOLAR OPERATION USING THE AD5301/  
AD5311/AD5321  
For single or multisupply systems where the minimum SCL  
swing requirements allow it, a CMOS SCL driver may be used,  
and the SCL pull-up resistor can be removed, making the SCL  
bus line fully CMOS compatible. This reduces power consump-  
tion in both the SCL driver and receiver devices. The SDA line  
remains open-drain, I2C compatible.  
The AD5301/AD5311/AD5321 has been designed for single-  
supply operation, but a bipolar output range is also possible  
using the circuit in Figure 37. The circuit below gives an output  
voltage range of 5 V. Rail-to-rail operation at the amplifier  
output is achievable using an AD820 or an OP295 as the output  
amplifier.  
Further changes, in the SDA line driver, may be made to make  
the system more CMOS compatible and save more power. As  
the SDA line is bidirectional, it cannot be made fully CMOS  
compatible. A switched pull-up resistor can be combined with  
a CMOS device with an open-circuit (three-state) input such  
that the CMOS SDA driver is enabled during write cycles and  
I2C mode is enabled during shared cycles, that is, readback,  
acknowledge bit cycles, start conditions, and stop conditions.  
Rev. B | Page 18 of 24  
 
 
 
 
 
 

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