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AD5273BRJ50-R2 PDF预览

AD5273BRJ50-R2

更新时间: 2024-02-27 11:22:58
品牌 Logo 应用领域
亚德诺 - ADI 转换器数字电位计电阻器光电二极管
页数 文件大小 规格书
20页 747K
描述
64-Position OTP Digital Potentiometer

AD5273BRJ50-R2 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:SOIC
包装说明:LSSOP,针数:8
Reach Compliance Code:unknown风险等级:5.77
Is Samacsys:N其他特性:IT CAN ALSO OPERATE FROM A 5V NOMINAL SUPPLY
标称带宽:0.11 kHz控制接口:2-WIRE SERIAL
转换器类型:DIGITAL POTENTIOMETERJESD-30 代码:R-PDSO-G8
JESD-609代码:e3长度:2.9 mm
湿度敏感等级:1功能数量:1
位置数:64端子数量:8
最高工作温度:105 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:LSSOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, LOW PROFILE, SHRINK PITCH
峰值回流温度(摄氏度):260认证状态:COMMERCIAL
电阻定律:LINEAR最大电阻容差:30%
最大电阻器端电压:3 V最小电阻器端电压:
座面最大高度:1.45 mm标称供电电压:3 V
表面贴装:YES标称温度系数:300 ppm/ °C
温度等级:INDUSTRIAL端子面层:MATTE TIN
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
标称总电阻:50000 Ω宽度:1.6 mm
Base Number Matches:1

AD5273BRJ50-R2 数据手册

 浏览型号AD5273BRJ50-R2的Datasheet PDF文件第14页浏览型号AD5273BRJ50-R2的Datasheet PDF文件第15页浏览型号AD5273BRJ50-R2的Datasheet PDF文件第16页浏览型号AD5273BRJ50-R2的Datasheet PDF文件第18页浏览型号AD5273BRJ50-R2的Datasheet PDF文件第19页浏览型号AD5273BRJ50-R2的Datasheet PDF文件第20页 
AD5273  
V
= 5V  
V
= 2.5V  
Resolution Enhancement  
DD2  
DD1  
Rp  
Rp  
Rp  
Rp  
Borrowed from ADI’s patented RDAC segmentation technique,  
users can configure three AD5273s to double the resolution. (See  
Figure 21.) First, U3 must be paralleled with a discrete resistor  
RP that is chosen to be equal to a step resistance (RP = RAB/64).We  
may see that adjusting U1 and U2 together forms the coarse 6-bit  
adjustment and adjusting U3 alone forms the finer 6-bit adjust-  
ment. As a result, the effective resolution becomes 12-bit.  
G
G
D
S
SDA1  
SCL1  
SDA2  
SCL2  
D
S
M1  
M2  
A1  
2.7V–5.5V  
AD5273  
2.5V  
CONTROLLER  
W1  
U1  
A3  
B1  
Figure 18. Level Shift for Different Voltage Operation  
R
U3  
W3  
P
A2  
B3  
Resistance Scaling  
W2  
The AD5273 offers 1 k, 10 k, 50 k, and 100 knominal  
resistances. For users who need to optimize the resolution with  
an arbitrary full-range resistance, the following techniques can  
be the solutions. Applicable only to the voltage divider mode, by  
paralleling a discrete resistor as shown in Figure 19, a propor-  
tionately lower voltage appears at terminal A–B.This translates  
into a finer degree of precision because the step size at terminal  
W will be smaller.The voltage can be found as:  
U2  
B2  
COARSE  
ADJUSTMENT  
FINE  
ADJUSTMENT  
Figure 21. Double the Resolution in Rheostat Mode Operation  
RDAC CIRCUIT SIMULATION MODEL  
The internal parasitic capacitances and the external capacitive  
loads dominate the ac characteristics of the digital potentiometers.  
Configured as a potentiometer divider, the –3 dB bandwidth of  
the AD5273 (1 kresistor) measures 6 MHz at half scale.TPCs  
15–18 provide the large signal BODE plot characteristics of the  
four available resistor versions 1 k, 10 k, 50 k, and 100 k.  
Figure 22 shows a parasitic simulation model.The code following  
Figure 22 provides a macro model net list for the 1 kdevice:  
R
/ /R2  
(
)
D
AB  
VW D =  
¥
¥VDD  
( )  
R3 + RAB / /R2 256  
(9)  
V
DD  
R3  
A
R2  
R1  
B
A
1kꢀ  
B
W
C
C
W
C
25pF  
A
B
25pF  
55pF  
W
Figure 19. Lowering the Nominal Resistance  
Figure 22. Circuit Simulation Model for RDAC = 1 k  
Figure 19 shows that the digital potentiometer changes steps lin-  
early. On the other hand, log taper adjustment is usually preferred in  
applications like volume control. Figure 20 shows another way of  
resistance scaling. In this circuit, the smaller the R2 with respect  
to RAB, the more the pseudo log taper characteristic it behaves.  
The wiper voltage is simply:  
Macro Model Net List for RDAC  
.PARAM D = 63, RDAC = 1E3  
*
.SUBCKT DPOT (A,W,B)  
*
RWB D / /R2  
( )  
VW D =  
¥VI  
( )  
CA  
RWA  
CW  
RWB  
CB  
*
A
A
W
W
B
0
W
0
B
0
25E-12  
RWA D + R  
D / /R2  
( )  
WB ( )  
(10)  
{(1-D/63)*RDAC+60}  
55E-12  
V
I
A
V
O
{D/63*RDAC+60}  
25E-12  
R1  
B
W
R2  
.ENDS DPOT  
Figure 20. Resistor Scaling with Log Adjustment  
Characteristics  
REV. 0  
–17–  

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