AD5255
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
1
24
23
22
21
20
19
18
17
16
15
14
13
A0_EE
A1_RDAC
A0_RDAC
RS
A1_EE
2
TEST0 (NC)
TEST1 (NC)
TEST2 (NC)
TEST3 (NC)
3
4
AD5255
TOP VIEW
(Not to Scale)
5
WP
6
SCL
C
, AV
DD
DD
7
SDA
A0
W0
B0
B1
W1
A1
8
DGND
9
V
, AV
SS
SS
10
A2
W2 11
12
B2
NC = NO CONNECT
Figure 3. Pin Configuration
Table 4. Pin Function Descriptions
Pin No. Mnemonic Description
1
2
3
4
A1_EE
I2C Device Address 1 for EEMEM.
I2C Device Address 1 for RDAC.
I2C Device Address 0 for RDAC.
Resets the scratchpad register with current contents of the EEMEM register. Factory defaults to midscale before
any programming.
A1_RDAC
A0_RDAC
RS
5
WP
Write Protect. When active low, WP prevents any changes to the present register contents, except that RESET
and Commands 1 and 8 still refresh the RDAC register from EEMEM.
Serial Input Register Clock. Shifts in one bit at a time on the positive clock edges.
Serial Data Input. Shifts in one bit at a time on the positive clock edges. The MSB is loaded first.
Ground. Logic ground reference.
Negative Supply. Connect to 0 V for single-supply applications.
A terminal of RDAC2.
Wiper terminal of RDAC2.
B terminal of RDAC2.
A terminal of RDAC1.
Wiper terminal of RDAC1.
B terminal of RDAC1.
B terminal of RDAC0.
Wiper terminal of RDAC0.
A terminal of RDAC0.
Positive Power Supply.
Test Pin 3. Do not connect.
Test Pin 2. Do not connect.
Test Pin 1. Do not connect.
6
7
8
9
SCL
SDA
DGND
VSS
A2
W2
B2
A1
W1
B1
B0
W0
A0
VDD
TEST3
TEST2
TEST1
TEST0
A0_EE
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
Test Pin 0. Do not connect.
I2C Device Address 0 for EEMEM.
Rev. 0 | Page 7 of 20