AD5254BRUZ10-RL7

更新时间： 2024-02-13 22:33:38

品牌	Logo	应用领域
亚德诺 - ADI		电位器存储
页数	文件大小	规格书
32页	576K
描述
Quad 64-/256-Position I2C Nonvolatile Memory Digital Potentiometers

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AD5254BRUZ10-RL7 数据手册

Data Sheet

AD5253/AD5254

INTERFACE TIMING CHARACTERISTICS

All input control voltages are specified with t_R= t_F= 2.5 ns (10% to 90% of 3 V) and timed from a voltage level of 1.5 V. Switching

characteristics are measured using both V_DD= 3 V and 5 V.

Table 3.

Parameter¹

Symbol

Conditions

Min Typ²Max Unit

INTERFACE TIMING

SCL Clock Frequency

t_BUFBus-Free Time Between Stop and Start t₁

f_SCL

400

kHz

μs

1.3

0.6

t_HD;STAHold Time (Repeated Start)

t₂

After this period, the first clock pulse is

generated.

t_LOWLow Period of SCL Clock

t₃

t₄

t₅

t₆

t₇

t₈

t₉

t₁₀

1.3

0.6

μs

t_HIGHHigh Period of SCL Clock

t_SU;STASet-up Time for Start Condition

t_HD;DATData Hold Time

0.9

t_SU;DATData Set-up Time

100

t_FFall Time of Both SDA and SCL Signals

t_RRise Time of Both SDA and SCL Signals

t_SU;STOSet-up Time for Stop Condition

EEMEM Data Storing Time

EEMEM Data Restoring Time at Power-On³t_{EEMEM_RESTORE1}V_DDrise time dependent. Measure without

decoupling capacitors at V_DDand V_SS.

300

0.6

t_{EEMEM_STORE}

300

EEMEM Data Restoring Time upon Restore t_{EEMEM_RESTORE2}V_DD= 5 V.

300

540

μs

Command or Reset Operation³

EEMEM Data Rewritable Time⁴

FLASH/EE MEMORY RELIABILITY

Endurance⁵

t_{EEMEM_REWRITE}

100

K cycles

Years

Data Retention^{6, 7}

100

¹See Figure 23 for location of measured values.

²Typical values represent average readings at 25°C and V_DD= 5 V.

³During power-up, all outputs are preset to midscale before restoring the EEMEM contents. RDAC0 has the shortest EEMEM restore time, whereas RDAC3 has the longest.

⁴Delay time after power-on or reset before new EEMEM data to be written.

⁵Endurance is qualified to 100,000 cycles per JEDEC Std. 22 Method A117 and measured at –40°C, +25°C, and +105°C; typical endurance at +25°C is 700,000 cycles.

⁶Retention lifetime equivalent at junction temperature T_J= 55°C per JEDEC Std. 22, Method A117. Retention lifetime based on an activation energy of 0.6 eV derates

with junction temperature.

⁷When the part is not in operation, the SDA and SCL pins should be pulled high. When these pins are pulled low, the I²C interface at these pins conducts a current of

about 0.8 mA at V_DD= 5.5 V and 0.2 mA at V_DD= 2.7 V.

Rev. C | Page 7 of 32

1...4 5 678 9 10...32

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