Data Sheet
AD5247
SPECIFICATIONS
ELECTRICAL CHARACTERISTICS—5 kΩ VERSION
VDD = 5 V ꢀ1% or 3 V ꢀ1%ꢁ VA = VDDꢁ −41°C < TA < +ꢀ25°Cꢁ unless otherwise noted.
Table 1.
Parameter
Symbol
Conditions
Min
Typ1
Max
Unit
DC CHARACTERISTICS—RHEOSTAT MODE
Resistor Differential Nonlinearity2
Resistor Integral Nonlinearity2
Nominal Resistor Tolerance3
Resistance Temperature Coefficient3
Output Resistance
R-DNL
R-INL
∆RAB
∆RAB/∆T
RWB
RWB, VA = no connect
RWB, VA = no connect
−1.5
−4
−30
0.1
0.75
+1.5
+4
+30
LSB
LSB
%
ppm/°C
Ω
45
75
Code = 0x00
300
DC CHARACTERISTICS—POTENTIOMETER DIVIDER MODE
Differential Nonlinearity4
Integral Nonlinearity4
Voltage Divider Temperature Coefficient
Full-Scale Error
DNL
INL
∆VW/∆T
VWFSE
VWZSE
−1
−1
0.1
0.2
15
−2
1
+1
+1
LSB
LSB
ppm/°C
LSB
LSB
Code = 0x40
Code = 0x7F
Code = 0x00
−3
0
0
2
Zero-Scale Error
RESISTOR TERMINALS
Voltage Range5
VA, VW
CA
GND
VDD
V
Capacitance A6
f = 1 MHz, measured to GND,
code = 0x40
f = 1 MHz, measured to GND,
code = 0x40
45
pF
Capacitance W6
CW
ICM
60
1
pF
nA
Common-Mode Leakage
DIGITAL INPUTS AND OUTPUTS
Input Logic High
Input Logic Low
Input Logic High
Input Logic Low
Input Current
Input Capacitance6
VA = VDD/2
VIH
VIL
VIH
VIL
IIL
VDD = 5 V
VDD = 5 V
VDD = 3 V
VDD = 3 V
2.4
2.1
V
V
V
V
μA
pF
V
0.8
0.6
1
VIN = 0 V or 5 V
CIL
VOL
5
Output Logic Low (SDA)
IOL = 3 mA
IOL = 6 mA
0.4
0.6
V
POWER SUPPLIES
Power Supply Range
Supply Current
VDD RANGE
IDD
2.7
5.5
7
5.2
2
V
VDD = 5.5 V; VIH = VDD or VIL = GND
VDD = 5 V; VIH = VDD or VIL = GND
VDD = 3.3 V; VIH = VDD or VIL = GND
VIH = 5 V or VIL = 0 V, VDD = 5 V
3
2.5
0.9
μA
μA
μA
μW
Power Dissipation7
PDISS
40
Power Supply Sensitivity
PSSR
VDD = 5 V 10%,
code = midscale
0.003
0.05 %/%
DYNAMIC CHARACTERISTICS6, 8
Bandwidth –3 dB
Total Harmonic Distortion
VW Settling Time
BW_5 K
THDW
tS
RAB = 5 kΩ, code = 0x40
VA = 1 V rms, VB = 0 V, f = 1 kHz
VA = 5 V, 1 LSB error band
RWB = 2.5 kΩ, RS = 0 Ω
1.2
0.05
1
MHz
%
μs
Resistor Noise Voltage Density
eN_WB
6
nV/√Hz
1 Typical specifications represent average readings at 25°C and VDD = 5 V.
2 Resistor position nonlinearity error R-INL is the deviation from an ideal value measured between the maximum resistance and the minimum resistance wiper
positions. R-DNL measures the relative step change from ideal between successive tap positions. Parts are guaranteed monotonic.
3 VA = VDD, wiper (VW) = no connect.
4 INL and DNL are measured at VW, with the RDAC configured as a potentiometer divider similar to a voltage output DAC. VA = VDD and VB = 0 V.
DNL specification limits of 1 LSB maximum are guaranteed monotonic under operating conditions.
5 Resistor Terminal A and Resistor Terminal W have no limitations on polarity with respect to each other.
6 Guaranteed by design and not subject to production test.
7 PDISS is calculated from (IDD × VDD). CMOS logic level inputs result in minimum power dissipation.
8 All dynamic characteristics use VDD = 5 V.
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