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AD5241BRU1M

更新时间： 2024-01-09 14:05:41
品牌 Logo 应用领域
亚德诺 - ADI 电位器
页数 文件大小 规格书
20页 550K
描述
I2C-Compatible, 256-Position Digital Potentiometers

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AD5241BRU1M 数据手册

 浏览型号AD5241BRU1M的Datasheet PDF文件第4页浏览型号AD5241BRU1M的Datasheet PDF文件第5页浏览型号AD5241BRU1M的Datasheet PDF文件第6页浏览型号AD5241BRU1M的Datasheet PDF文件第8页浏览型号AD5241BRU1M的Datasheet PDF文件第9页浏览型号AD5241BRU1M的Datasheet PDF文件第10页 
AD5241/AD5242  
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS  
1
2
3
4
5
6
7
1
2
3
4
5
16  
15  
14  
13  
12  
A
W
B
14  
13  
12  
11  
10  
9
A
2
O
O
A
1
1
1
1
1
1
1
1
W
2
NC  
B
2
W
B
O
2
AD5241  
AD5242  
O
2
V
V
DD  
SS  
TOP VIEW  
TOP VIEW  
(Not to Scale)  
V
V
SHDN  
DGND  
AD1  
(Not to Scale)  
SS  
DD  
SHDN  
SCL  
6
7
8
11 DGND  
SCL  
SDA  
10  
8
AD1  
AD0  
9
AD0  
SDA  
NC = NO CONNECT  
Figure 6. AD5241 Pin Configuration  
Figure 7. AD5242 Pin Configuration  
Table 4. AD5241 Pin Function Descriptions  
Table 5. AD5242 Pin Function Descriptions  
Pin No. Mnemonic Description  
Pin No. Mnemonic Description  
1
2
3
ꢀ
A1  
W1  
B1  
Resistor Terminal A1.  
Wiper Terminal W1.  
Resistor Terminal B1.  
Positive Power Supply, Specified for  
Operation from 2.2 V to ꢁ.ꢁ V.  
Active low, asynchronous connection of  
Wiper W to Terminal B, and open circuit  
of Terminal A. RDAC register contents  
unchanged. SHDN should tie to VDD  
if not used.  
1
2
3
ꢀ
ꢁ
O1  
A1  
W1  
B1  
Logic Output Terminal O1.  
Resistor Terminal A1.  
Wiper Terminal W1.  
Resistor Terminal B1.  
Positive Power Supply, Specified for  
Operation from 2.2 V to ꢁ.ꢁ V.  
Active Low, Asynchronous Connection  
of Wiper W to Terminal B, and Open  
Circuit of Terminal A. RDAC register  
contents unchanged. SHDN should  
tie to VDD, if not used.  
Serial Clock Input.  
Serial Data Input/Output.  
Programmable Address Bit for Multiple  
Package Decoding. Bit AD0 and Bit AD1  
provide four possible addresses.  
Programmable Address Bit for Multiple  
Package Decoding. Bit AD0 and Bit AD1  
provide four possible addresses.  
Common Ground.  
Negative Power Supply, Specified for  
Operation from 0 V to −2.7 V.  
VDD  
VDD  
ꢁ
SHDN  
6
SHDN  
6
7
8
SCL  
SDA  
AD0  
Serial Clock Input.  
7
8
9
SCL  
SDA  
AD0  
Serial Data Input/Output.  
Programmable Address Bit for Multiple  
Package Decoding. Bit AD0 and Bit AD1  
provide four possible addresses.  
Programmable Address Bit for Multiple  
Package Decoding. Bit AD0 and Bit AD1  
provide four possible addresses.  
Common Ground.  
Negative Power Supply, Specified for  
Operation from 0 V to −2.7 V.  
9
AD1  
10  
AD1  
10  
11  
DGND  
VSS  
11  
12  
DGND  
VSS  
12  
13  
1ꢀ  
O2  
NC  
O1  
Logic Output Terminal O2.  
No Connect.  
Logic Output Terminal O1.  
13  
1ꢀ  
1ꢁ  
16  
O2  
B2  
W2  
A2  
Logic Output Terminal O2.  
Resistor Terminal B2.  
Wiper Terminal W2.  
Resistor Terminal A2.  
Rev. C | Page 7 of 20  
 
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