AD5220
ABSOLUTE MAXIMUM RATINGS*
(TA = +25°C, unless otherwise noted)
PIN CONFIGURATION
VDD to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V, +7 V
VA, VB, VW to GND . . . . . . . . . . . . . . . . . . . . . . . . . . 0 V, VDD
AX–BX, AX–WX, BX–WX . . . . . . . . . . . . . . . . . . . . . . ±20 mA
Digital Input Voltage to GND . . . . . . . . . . . 0 V, VDD + 0.3 V
Operating Temperature Range . . . . . . . . . . . –40°C to +85°C
Maximum Junction Temperature (TJ MAX) . . . . . . . .+150°C
Storage Temperature . . . . . . . . . . . . . . . . . . –65°C to +150°C
Lead Temperature (Soldering, 10 sec) . . . . . . . . . . . .+300°C
Package Power Dissipation . . . . . . . . . . . . . . (TJ max–TA)/θJA
Thermal Resistance θJA
1
2
3
4
8
7
6
5
V
CLK
DD
AD5220
TOP VIEW
(Not to Scale)
U/D
A1
CS
B1
W1
GND
P-DIP (N-8) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103°C/W
SOIC (SO-8) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 158°C/W
µSOIC (RM-8) . . . . . . . . . . . . . . . . . . . . . . . . . . . 206°C/W
*Stresses above those listed under Absolute Maximum Ratings may cause
permanent damage to the device. This is a stress rating only; functional operation
of the device at these or any other conditions above those indicated in the
operational sections of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
PIN FUNCTION DESCRIPTIONS
Description
Pin
No. Name
1
2
3
4
5
6
7
8
CLK
U/D
A1
Serial Clock Input, Negative Edge Triggered
UP/DOWN Direction Increment Control
Terminal A1
Table I. Truth Table
CS
CLK U/D
Operation
L
L
H
t
t
H
L
Wiper Increment Toward Terminal A
Wiper Decrement Toward Terminal B
Wiper Position Fixed
GND
W1
Ground
Wiper Terminal
X
X
B1
Terminal B1
CS
Chip Select Input, Active Low
Positive Power Supply
VDD
1
0
CS
tCSS
tCL
tCH
tCSH
1
0
CLK
tUDS
1
0
U/D
Figure 3. Detail Timing Diagram
ORDERING GUIDE
Package Descriptions
Model
k⍀
Temperature Range
Package Options
AD5220BN10
AD5220BR10
AD5220BRM10
AD5220BN50
AD5220BR50
AD5220BRM50
AD5220BN100
AD5220BR100
AD5220BRM100
10
10
10
50
50
50
100
100
100
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
8-Lead Plastic DIP
8-Lead (SOIC)
8-Lead µSOIC
8-Lead Plastic DIP
8-Lead (SOIC)
8-Lead µSOIC
8-Lead Plastic DIP
8-Lead (SOIC)
8-Lead µSOIC
N-8
SO-8
RM-8
N-8
SO-8
RM-8
N-8
SO-8
RM-8
NOTE
The AD5220 die size is 37 mil × 54 mil, 1998 sq mil; 0.938 mm × 1.372 mm, 1.289 sq mm. Contains 754 transistors. Patent Number 5495245 applies.
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD5220 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
WARNING!
ESD SENSITIVE DEVICE
precautions are recommended to avoid performance degradation or loss of functionality.
REV. 0
–3–
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