Datasheet > AD484M1644VTA-8LI

AD484M1644VTA-8LI

更新时间： 2022-11-29 04:15:25

品牌	Logo	应用领域
其他 - ETC		半导体动态存储器
页数	文件大小	规格书
20页	86K
描述
Ascend Semiconductor Corporation(64Mb SDRAM)

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Ascend Semiconductor Corporation

64Mb SDRAM

64Mb( 4Banks ) Synchronous DRAM

AD484M1644VTA ( 4Mx16 )

Description

The AD484M1644VTA is Synchronous Dynamic Random Access Memory ( SDRAM )

organized as 1,048,756 words x 4 banks x 16 bits. All inputs and outputs are synchronized

with the positive edge of the clock . The 64Mb SDRAM uses synchronized pipelined

architecture to achieve high speed data transfer rates and is designed to operate in 3.3V

low power memory system. It also provides auto refresh with power saving / down mode.

All inputs and outputs voltage levels are compatible with LVTTL .

Features

• Fully synchronous to positive clock edge

• Single 3.3V +/- 0.3V power supply

• LVTTL compatible with multiplexed address

• Industrial temperature available

• Programmable Burst Length ( BL ) - 1,2,4,8 or full page

• Programmable CAS Latency ( CL ) -1, 2 or 3

• Data Mask ( DQM ) for Read/Write masking

• Programmable wrap sequential - Sequential ( BL = 1/2/4/8/full page )

- Interleave ( BL = 1/2/4/8 )

• Burst read with single-bit write operation

• All inputs are sampled at the positive rising edge of the system clock.

• Auto refresh and self refresh

• 4,096 refresh cycles / 64ms

Ordering Information

Part number

Max

Package

Operation Range

Power

Note

Freg.

AD484M1644VTA-55

183MHz

167MHz

143MHz

66MHz

54pins,

TSOPII

Commercial Range : 0℃ ~ 70℃

Standard

AD484M1644VTA-6

AD484M1644VTA-7

AD484M1644VTA-15

AD484M1644VTA-7L

AD484M1644VTA-8L

AD484M1644VTA-10L

54pins,

TSOPII

Commercial Range : 0℃ ~ 70℃

Standard

54pins,

TSOPII

Standard

54pins,

TSOPII

Standard

CL1

143MHz

125MHz

100MHz

54pins,

TSOPII

Low power

54pins,

TSOPII

54pins,

TSOPII

* Ascend Semiconductor reserves the right to change products or specification without notice.

Preliminary

1 234 5 6 7...20

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