Data Sheet
AD4695/AD4696
Parameter
Test Conditions/Comments
fS = 500 kSPS
fS = 1 MSPS
Min
Typ
2.6
5.2
Max
3.3
6.6
Unit
mA
mA
VDD Current (Conversion Mode)
Reference High-Z Mode Disabled,
Analog Input High-Z Mode Disabled
VDD = 1.8 V, internal LDO disabled
fS = 10 kSPS
42
µA
fS = 500 kSPS
fS = 1 MSPS
fS = 10 kSPS
2
4
53
mA
mA
µA
Reference High-Z Mode Enabled,
Analog Input High-Z Mode Enabled
fS = 500 kSPS
fS = 1 MSPS
2
5
3.2
6.4
mA
mA
VIO Dynamic Current
Register Configuration Mode
Conversion Mode
VIO = 1.8 V
Streaming mode, SCK frequency (fSCK) = 50 MHz
Status bits enabled
fS = 10 kSPS
fS = 500 kSPS
fS = 1 MSPS
125
µA
3.5
162
325
µA
µA
µA
360
POWER DISSIPATION7
AVDD = 5 V, VIO = 1.8 V
Standby Power Dissipation
Internal LDO Disabled
Internal LDO Enabled
VDD = 1.8 V
LDO_IN = 5 V
4
46
µW
µW
Power Dissipation, Internal LDO Disabled
Reference High-Z Mode Disabled,
Analog Input High-Z Mode Disabled
LDO_IN = AGND, VDD = 1.8 V
fS = 10 kSPS
85
µW
fS = 500 kSPS
fS = 1 MSPS
fS = 10 kSPS
4
8
170
mW
mW
µW
Reference High-Z Mode Enabled,
Analog Input High-Z Mode Enabled
fS = 500 kSPS
fS = 1 MSPS
LDO_IN = 5 V
fS = 10 kSPS
8
16
9.8
19.5
mW
mW
Power Dissipation, Internal LDO Enabled
Reference High-Z Mode Disabled,
Analog Input High-Z Mode Disabled
270
µW
fS = 500 kSPS
fS = 1 MSPS
fS = 10 kSPS
10.5
21
395
mW
mW
µW
Reference High-Z Mode Enabled,
Analog Input High-Z Mode Enabled
fS = 500 kSPS
fS = 1 MSPS
16.5
33
20.5
41.0
mW
mW
Autocycle Mode Power Dissipation
LDO_IN = 5 V, internal LDO enabled,
autocycle mode enabled
AC_CYC = 0x0
AC_CYC = 0x7
2.3
0.2
mW
mW
TEMPERATURE RANGE
Specified Performance
TMIN to TMAX
−40
+125
°C
1 See the Channel Configuration Options section for a detailed description of unipolar mode, pseudo bipolar mode, and the channel pin assignment options.
2 IN+ and IN− represent the analog inputs connected to the positive and negative inputs of the AD4695/AD4696 ADC core via the internal multiplexer (see the
Multiplexer section and Channel Configuration Options section).
3 The analog input leakage current specification refers to the input current of the analog input pins during periods when the ADC is not performing conversions and the
analog input voltage is already settled.
4 Offset error and gain error specifications are taken with the offset and gain correction registers set to the default values, which correspond to no offset or gain
correction. See the Offset and Gain Correction section for more information.
5 %FS is the percentage of the ADC full-scale (see the Transfer Function section for a definition of full scale).
6 REXT and CEXT refer to the resistor and capacitor, respectively, that make up the recommended external RC filters at the analog inputs (see the External RC Filter section).
7 For the power supply current and power dissipation specifications where analog input high-Z mode is enabled, analog input high-Z mode is set to be enabled for all
channels. The power consumption scales with the percentage of conversions performed with analog input high-Z mode enabled.
Rev. 0 | Page 7 of 96
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