Datasheet > AD2LC-S1C-R/Q

AD2LC-S1C-R/Q

更新时间： 2022-05-14 22:08:08

品牌	Logo	应用领域
爱模 - MSYSTEM		/
页数	文件大小	规格书
7页	187K
描述
Plug-in Signal Conditioners M-UNIT

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数据手册

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AD2LC-S1C-R/Q 数据手册

MODEL: AD2LC

SCHEMATIC CIRCUITRY & CONNECTION DIAGRAM

PL1 PL2

(POL) (HOLD)

Isolation

STRAIN

GAUGE

–

OUTPUT

Low Drift

Amplifier

INPUT

EXC.

Digital

Computation

Circuit

Low Drift

DC Volt.

Stabilizer

DATA

U(+)

V(–)

POWER

ITEM

–

CONTACT

INPUT (Di)

Base Socket

■ Connection Examples

• OPEN COLLECTOR

• CMOS LEVEL (5V-CMOS)

AD2LC

OUTPUT

LOAD

COM (

)

COM (-)

H : 4.5V or more

L : 0.5V or less

For inductive load, connect

a spark quenching diode at

load side.

26-pin

CONNECTOR

26-pin

CONNECTOR

Max. collector-emitter voltage : 30V DC

Max. collector current : 30mA

Saturation voltage : ≤ 1.1V DC

OUTPUT CONNECTOR (26-pin)

■ BCD OUTPUT

■ BINARY,TWO’S COMPLEMENT OUTPUTS

PIN NO.

ASSIGNMENT

1 × 10⁰

2 × 10⁰

4 × 10⁰

8 × 10⁰

1 × 10¹

2 × 10¹

4 × 10¹

8 × 10¹

1 × 10²

2 × 10²

4 × 10²

8 × 10²

1 × 10³

2 × 10³

4 × 10³

8 × 10³

PIN NO.

ASSIGNMENT

COM

PIN NO.

ASSIGNMENT

PIN NO.

ASSIGNMENT

COM

B ¹

COM

OVF

POL

DAV

HOLD

COM

No connection

B¹⁰

B¹¹

B¹²

B¹³

B¹⁴

B¹⁵

*1. HOLD signal is for input, the others are for output.

Note: With the number of bits set to 14 (or 12, 10, 8) with ITEM 20, Pin No. 1 – 14 (or 1 – 12, 1 – 10, 1 – 8) are valid.

AD2LC SPECIFICATIONS

ES-1388 Rev.14 Page 6/7

https://www.m-system.co.jp/

1...3 4 567

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