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AD261AND-5

更新时间： 2024-01-26 20:40:27
品牌 Logo 应用领域
亚德诺 - ADI /
页数 文件大小 规格书
6页 186K
描述
High Speed, Logic Isolator

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AD261AND-5 技术参数

是否无铅： 含铅是否Rohs认证： 不符合
生命周期：Active零件包装代码：QIP
包装说明：QIP,针数：22/16
Reach Compliance Code：unknown风险等级：5.59
JESD-30 代码：R-PQIP-T16湿度敏感等级：NOT SPECIFIED
I/O 线路数量：5端口数量：1
端子数量：16最高工作温度：85 °C
最低工作温度：-25 °C封装主体材料：PLASTIC/EPOXY
封装代码：QIP封装形状：RECTANGULAR
封装形式：IN-LINE峰值回流温度（摄氏度）：NOT SPECIFIED
认证状态：COMMERCIAL座面最大高度：11.18 mm
最大供电电压：5.75 V最小供电电压：4 V
标称供电电压：5 V表面贴装：NO
温度等级：OTHER端子面层：NOT SPECIFIED
端子形式：THROUGH-HOLE端子节距：2.54 mm
端子位置：QUAD处于峰值回流温度下的最长时间：NOT SPECIFIED
宽度：11.43 mmuPs/uCs/外围集成电路类型：PARALLEL IO PORT, GENERAL PURPOSE
Base Number Matches：1

AD261AND-5 数据手册

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(Typical at T = +25؇C, +5 V dc , +5 V dc , t = 50 ns max unless otherwise noted)  
AD261–SPECIFICATIONS  
A
SYS  
FLD RR  
P aram eter  
Conditions  
Min  
Typ  
Max  
Units  
INPUT CHARACT ERIST ICS  
T hreshold Voltage  
Positive T ransition (VT +  
)
+5 V dcSYS = 4.5 V  
+5 V dcSYS = 5.5 V  
+5 V dcSYS = 4.5 V  
+5 V dcSYS = 5.5 V  
+5 V dcSYS = 4.5 V  
+5 V dcSYS = 5.5 V  
2.0  
3.0  
0.9  
1.2  
0.4  
0.5  
2.7  
3.2  
1.8  
2.2  
0.9  
1.0  
5
3.15  
4.2  
2.2  
3.0  
1.4  
1.5  
V
V
V
V
V
V
pF  
µA  
Negative T ransition (VT –  
Hysteresis Voltage (VH)  
)
Input Capacitance (CIN  
Input Bias Current (IIN  
)
)
Per Input  
0.5  
OUT PUT CHARACT ERIST ICS  
Output Voltage1  
High Level (VOH  
)
+5 V dcSYS = 4.5 V, | IO| = 0.02 mA  
+5 V dcSYS = 4.5 V, | IO| = 4 mA  
+5 V dcSYS = 4.5 V, | IO| = 0.02 mA  
+5 V dcSYS = 4.5 V, | IO| = 4 mA  
4.4  
3.7  
V
V
V
V
Low Level (VOL  
)
0.1  
0.4  
Output T hree-State Leakage Current  
ENABLESYS/FLD @ Logic Low/High Level Respectively  
0.5  
µA  
DYNAMIC RESPONSE 1 (Refer to Figure 2)  
Max Logic Signal Frequency (fMIN  
Waveform Edge Symmetry Error (tERROR  
Logic Edge Propagation Delay (tPHL, tPLH  
Minimum Pulsewidth (tPWMIN  
)
50% Duty Cycle, +5 V dcSYS = 5 V  
tPHL vs. tPLH  
20  
25  
MHz  
ns  
ns  
)
±1  
14  
)
25  
)
ns  
Max Output Update Delay on Fault or After  
Power-Up Reset Interval (≈ 30 µs)2  
12  
µs  
ISOLAT ION BARRIER RAT ING3  
Operating Isolation Voltage (VCMV  
)
AD261A  
AD261B  
AD261A  
AD261B  
375  
1250  
V rms  
V rms  
V rms  
V rms  
V/µs  
4
Isolation Rating T est Voltage (VCMV TEST  
)
1750  
3500  
10,000  
Transient Immunity (VTRANSIENT  
)
Isolation Mode Capacitance (CISO  
Capacitive Leakage Current (ILEAD  
)
)
Total Capacitance, All Lines  
240 V rms @ 60 Hz  
9
15  
2
pF  
µA rms  
POWER SUPPLY  
Supply Voltage (+5 V dcSYS and +5 V dcFLD  
Power Dissipation Capacitance  
)
Rated Performance  
Operating  
Effective, per Input, Either Side  
Effective per Output, Either Side—No Load  
Each, +5 V dcSYS & FLD  
4.5  
4.0  
5.5  
5.75  
V dc  
V dc  
pF  
pF  
mA  
mA  
8
28  
4
Quiescent Supply Current  
Supply Current  
All Lines @ 10 MHz (Sum of +5 V dcSYS & FLD  
)
18  
TEMPERATURE RANGE  
Rated Performance (TA)5  
–25  
–40  
+85  
+85  
°C  
°C  
Storage (TSTG  
)
NOT ES  
1For best performance, bypass +5 V dc supplies to com., at or near the device (0.01 µF). +5 V dc supplies are also internally bypassed with 0.05 µF.  
2As the supply voltage is applied to either side of the AD261, the internal circuitry will go into a power-up reset mode (all lines disabled) for about 30 µs after the point  
where +5 V dcSYS & FLD passes above 3.3 V.  
3“Operating” isolation voltage is derived from the Isolation T est Voltage in accordance with such methods as found in VDE-0883 wherein a device will be “hi-pot”  
tested at twice the operating voltage, plus one thousand volts. Partial discharge testing, with an acceptance threshold of 80 pC of discharge may be considered the  
same as a hi-pot test (but nondestructive).  
4Partial Discharge at 80 pC T HLD.  
5Supply Current will increase slightly, but otherwise the unit will function within specification to –40°C.  
Specifications are subject to change without notice.  
REV. 0  
–2–  
123456

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