Datasheet > ACS8947T

ACS8947T

更新时间： 2024-02-16 18:13:42

品牌	Logo	应用领域
商升特 - SEMTECH		/
页数	文件大小	规格书
30页	1882K
描述
Jitter Attenuating, Multiplying Phase-Locked Loop with Automatic Input Switch and Data Resynchronization Path

阅读下载

获取价格

技术参数
数据手册

如果您发现信息不准确，欢迎纠错

ACS8947T 技术参数

是否无铅：	不含铅	是否Rohs认证：	符合
生命周期：	Active	零件包装代码：	QFN
包装说明：	7 X 7 MM, LEAD FREE, QFN-48	针数：	48
Reach Compliance Code：	compliant	HTS代码：	8542.39.00.01
风险等级：	5.81	应用程序：	SONET;SDH
JESD-30 代码：	S-XQCC-N48	JESD-609代码：	e3
长度：	7 mm	湿度敏感等级：	1
功能数量：	1	端子数量：	48
最高工作温度：	85 °C	最低工作温度：	-40 °C
封装主体材料：	UNSPECIFIED	封装代码：	HVQCCN
封装形状：	SQUARE	封装形式：	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
峰值回流温度（摄氏度）：	260	认证状态：	Not Qualified
座面最大高度：	1 mm	标称供电电压：	3.3 V
表面贴装：	YES	电信集成电路类型：	ATM/SONET/SDH SUPPORT CIRCUIT
温度等级：	INDUSTRIAL	端子面层：	MATTE TIN
端子形式：	NO LEAD	端子节距：	0.5 mm
端子位置：	QUAD	处于峰值回流温度下的最长时间：	NOT SPECIFIED
宽度：	7 mm	Base Number Matches：	1

ACS8947T 数据手册

ACS8947T JAM PLL

ADVANCED COMMS & SENSING

FINAL

DATASHEET

Pin Descriptions

In the Type column:

In the I/O column of the pin description tables that follow:

I = input

LVTTL/LVCMOS^U= LVTTL/LVCMOS input with pull-up

resistor

O = output

I/O = bi-directional

P = power

LVTTL/LVCMOS_D= LVTTL/LVCMOS input with pull

down resistor

A = analog

Table 1 Power pins

Pin No.

Symbol

I/O

Type

Description

1, 4,

7, 10

VDDO1, VDDO2,

VDDO3, VDDO4

Independent voltage supplies to power each clock output (differential pair of pins)

OUT1N/P to OUT4N/P respectively. +3.3 V (±5%).

To disable an output and save power, tie associated VDD to 0V.

VDDADIV

Supply voltage for internal dividers in VCO loop, kept as an isolated supply to allow for low

supply noise for the output divider stages. +3.3 V (±5%).

VDDP1

VDDP2

Supply voltage to differential inputs, alarm and configuration pins. +3.3 V (±5%).

Supply voltage to SYNC input and output pins, rate selection pins, input selection pins

and reset pin. +3.3 V (±5%).

VDDARF

Supply voltage for phase and frequency detector (PFD), kept as an isolated supply to

allow for low supply noise. +3.3 V (±5%).

VDDOSC

VSSOSC

VSS0

Supply voltage to the internal VCO. +3.3 V (+5%/-10%).

Supply ground 0 V for the internal VCO.

Common supply ground 0 V.

This is the central leadframe pad on the underside of the package.

Table 2 Internally connected pins

Pin No.

Symbol

I/O

Type

Description

IC1

Connect to ground.

Table 3 Functional Pins

Pin No.

Symbol

OUT1N

I/O

Type

Description

CML or

LVPECL

One of four CML or LVPECL differential outputs, partnered with pin 3. Programmable at

spot frequencies from 1.23 MHz to 625 MHz. The output frequency is defined by the

configuration pin settings at power up or when RESETB is asserted (logic 0).

See PLL Configuration.

The output is ON when VDD01 is supplied with 3.3 V, or OFF when VDD01 is tied to zero

volts. If VDD01 is connected to 0 V, remove the external biasing resistors.

OUT1P

CML or

LVPECL

CML or LVPECL differential output partnered with pin 2. See pin 2 description for more

detail.

Page4

www.semtech.com

1 2 345 6 7...30

下载PDF

与ACS8947T相关器件

型号	品牌	描述	获取价格	数据表
ACS9010	SEMTECH	4 x E1/T1 Fiber Mux/De-mux over One Fiber Optic Cable	获取价格
ACS9020	SEMTECH	Interface Circuit, PQFP64, TQFP-64	获取价格
ACS9510	IQD	TCXO Specification	获取价格
ACS9520PB	SEMTECH	ADVANCED COMMS PRODUCT GROUP	获取价格
ACS9520T	IQD	TCXO Specification	获取价格
ACS9522PB	SEMTECH	ADVANCED COMMS PRODUCT GROUP	获取价格

与ACS8947T相关文章

MAX6675资料手册参数详解、引脚配置说明
2024-05-13

4
LM258引脚图及功能介绍、主要参数分析
2024-05-13

2
CD4052资料手册参数详解、引脚配置说明
2024-05-13

3
一文带你了解TPS5430资料手册分析：参数介绍、引脚配置说明
2024-05-13

3

产品中心

服务支持

精选活动

关于我们

帮助中心

ACS8947T

ACS8947T 技术参数

ACS8947T 数据手册

与ACS8947T相关器件

与ACS8947T相关文章

您还可以找

产品中心

服务支持

精选活动

关于我们

帮助中心

ACS8947T

ACS8947T 技术参数

ACS8947T 数据手册

与ACS8947T相关器件

与ACS8947T相关文章

您还可以找

您在本页遇到什么问题？