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ACS422D68TAGZBX PDF预览

ACS422D68TAGZBX

更新时间: 2024-01-05 14:42:49
品牌 Logo 应用领域
艾迪悌 - IDT PC电信电信集成电路
页数 文件大小 规格书
93页 1733K
描述
PCM Codec

ACS422D68TAGZBX 技术参数

是否Rohs认证: 符合生命周期:Contact Manufacturer
Reach Compliance Code:compliantHTS代码:8542.39.00.01
风险等级:5.59JESD-609代码:e3
湿度敏感等级:3电信集成电路类型:PCM CODEC
端子面层:Matte Tin (Sn)Base Number Matches:1

ACS422D68TAGZBX 数据手册

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ACS422x68  
LOW-POWER, HIGH-FIDELITY, INTEGRATED CODEC  
15.DOCUMENT REVISION HISTORY  
Revision  
0.5  
Date  
Description of Change  
April 2011  
May 2011  
initial release  
0.51  
Updated application information for class D amplifier.  
Corrected mismatch between pinout and package number assignments. Front page description and  
target applications updated.  
0.52  
0.53  
0.54  
May 2011  
June 2011  
July 2011  
Updated registers for ZB silicon. R136 default to 08h, R34 default to 08h, R27 bits 1:2 now reserved.  
R16, R8, R9 bit 7 now reserved. R31 bit 0 now sd_force_on  
Updated HLA/HAG pinout and pin tables. Added low power mode typical power consumption table  
and updated standard typical values.  
Removed Preliminary and Confidential status from datasheet. Updated TAG/TLA package diagram.  
Removed applications section, see reference design and application notes on www.idt.com, updates  
to the electrical characteristics. Compressor/limiter configuration section separated. Updated audio  
output references to include 2W at 4ohms. Added DDX(TM) name and logo. Removed NAG/HLA  
package option and pinout.  
1.0  
July 2011  
Added HLA package option. Changed Power Supply Rejection Ration maximum from 5.5 V to 5.25  
V.  
1.1  
1.2  
November 2011  
January 2012  
Corrected the I/O type for the Analog output pins. Corrected the pin location in Analog output pin  
table for the BTL outputs.  
1.3  
1.4  
September 2012  
October 2012  
Clarifications to MCLK rate. Updated PLL Electrical characteristics.  
Corrected HP_L and HP_R pin location in pin table to match the pin diagram.  
Removed typical and low power consumption tables from electricals section, since these metrics are  
driven by software settings and are system specific, the typicals listed were not representative of  
what can be expected of the device.  
1.5  
November 2012  
1.6  
1.7  
February 2013  
July 2013  
Corrected the package drawing to dual row HLA.  
Added Thermal pad and DAP pin information. Clarified Device IDs for the two device versions.  
6024 Silver Creek Valley Road  
San Jose, California 95138  
DISCLAIMER Integrated Device Technology, Inc. (IDT) and its subsidiaries reserve the right to modify the products and/or specifications de-  
scribed herein at any time and at IDT’s sole discretion. All information in this document, including descriptions of product features and perfor-  
mance, is subject to change without notice. Performance specifications and the operating parameters of the described products are determined  
in the independent state and are not guaranteed to perform the same way when installed in customer products. The information contained  
herein is provided without representation or warranty of any kind, whether express or implied, including, but not limited to, the suitability of IDT’s  
products for any particular purpose, an implied warranty of merchantability, or non-infringement of the intellectual property rights of others. This  
document is presented only as a guide and does not convey any license under intellectual property rights of IDT or any third parties.  
IDT’s products are not intended for use in life support systems or similar devices where the failure or malfunction of an IDT product can be  
reasonably expected to significantly affect the health or safety of users. Anyone using an IDT product in such a manner does so at their own  
risk, absent an express, written agreement by IDT.  
Integrated Device Technology, IDT and the IDT logo are registered trademarks of IDT. Other trademarks and service marks used herein, in-  
cluding protected names, logos and designs, are the property of IDT or their respective third party owners.  

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