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ACPL-772L-320E PDF预览

ACPL-772L-320E

更新时间： 2024-09-25 19:12:59
品牌 Logo 应用领域
安华高科 - AVAGO 输出元件光电
页数 文件大小 规格书
11页 207K
描述
1 CHANNEL LOGIC OUTPUT OPTOCOUPLER, 25Mbps, ROHS COMPLIANT, SURFACE MOUNT, DIP-8

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ACPL-772L-320E 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Active包装说明：ROHS COMPLIANT, SURFACE MOUNT, DIP-8
Reach Compliance Code：compliantECCN代码：EAR99
HTS代码：8541.40.80.00Factory Lead Time：26 weeks
风险等级：5.7其他特性：CMOS COMPATIBLE, UL RECOGNIZED
配置：COMPLEX标称数据速率：25 MBps
最大正向电流：0.01 A最大绝缘电压：3750 V
JESD-609代码：e3安装特点：SURFACE MOUNT
元件数量：1最大通态电流：0.01 A
最高工作温度：105 °C最低工作温度：-40 °C
光电设备类型：LOGIC IC OUTPUT OPTOCOUPLER标称响应时间：4e-8 ns
子类别：Optocoupler - IC Outputs最小供电电压：3 V
标称供电电压：5.5 V表面贴装：YES
端子面层：Matte Tin (Sn)Base Number Matches：1

ACPL-772L-320E 数据手册

 浏览型号ACPL-772L-320E的Datasheet PDF文件第2页浏览型号ACPL-772L-320E的Datasheet PDF文件第3页浏览型号ACPL-772L-320E的Datasheet PDF文件第4页浏览型号ACPL-772L-320E的Datasheet PDF文件第5页浏览型号ACPL-772L-320E的Datasheet PDF文件第6页浏览型号ACPL-772L-320E的Datasheet PDF文件第7页 
ACPL-772L and ACPL-072L  
3.3V/5V High Speed CMOS Optocoupler  
Data Sheet  
Lead (Pb) Free  
RoHS 6 fully  
compliant  
RoHS 6 fully compliant options available;  
-xxxE denotes a lead-free product  
Description  
Features  
• Dual voltage operation (3.3V and 5V)  
Available in either an 8-pin DIP or SO-8 style respectively,  
the ACPL-772L or ACPL-072L optocouplers utilize the • Allow level shifting functionality  
latest CMOS IC technology to achieve outstanding speed  
performance of minimum 25MBd data rate and 6ns  
maximum pulse width distortion.  
• Support high Speed datarate of 25 MBd  
• Wide Temperature operation  
• CMOS output and buffer input  
Basic building blocks of this family of products are a  
CMOS LED driver IC, a high speed LED and a CMOS  
detector IC. A CMOS logic input signal controls the LED  
driver IC, which supplies current to the LED. The detector  
IC incorporates an integrated photodiode, a high speed  
transimpedance amplifier, and a voltage comparator with  
an output driver.  
• Compatible with CMOS and TTL logic level  
• Lower power consumption with 3.3V supply  
• Good AC performance with lower pulse width  
distortion  
• Lead-free option available  
Specifications  
Functional Diagram  
• 3.3V and 5V CMOS Compatibility  
• High Speed: DC to 25 MBd  
**V  
DD1  
1
2
8
7
V
**  
• 6ns max. Pulse Width Distortion  
• 40 ns max. Prop. Delay  
• 20 ns max. Prop. Delay Skew  
• 10 kV/ms min. Common Mode Rejection  
• -40 °C to 105 °C Temperature Range  
DD2  
V
NC*  
I
I
O
3
4
6
5
NC*  
V
O
LED1  
• Safety and Regulatory Approvals:  
UL Recognised  
GND  
GND  
1
2
SHIELD  
-
5000V for 1 min. per UL1577 for ACPL-772L  
rms  
for option 020  
*
Pin 3 is the anode of the internal LED and must be left unconnected  
for guaranteed datasheet performance. Pin 7 is not connected  
internally.  
-
3750V for 1 min. per UL1577 for ACPL-072L  
rms  
CSA Component Acceptance Notice #5  
IEC/EN/DIN EN 60747-5-2  
** A 0.1uF bypass capacitor must be connected between pins 1 and 4,  
and 5 and 8.  
– V  
= 630 V  
for ACPL-772L Option 060  
IORM  
peak  
– V  
= 560 V  
for ACPL-072L Option 060  
IORM  
peak  
TRUTH TABLE (POSITIVE LOGIC)  
Applications  
V , INPUT  
LED1  
OFF  
ON  
V , OUTPUT  
I
O
• Digital Fieldbus Isolation: DeviceNet, Profibus, SDS  
• Multiplexed Data Transmission  
• General Instrument and Data Acquisition  
• Computer Peripheral interface  
H
L
H
L
• Microprocessor System Interface  
CAUTION: It is advised that normal static precautions be taken in handling and assembly  
of this component to prevent damage and/or degradation, which may be induced by ESD.  
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